ZHCSD95D January 2015 – April 2021 BQ34Z100-G1
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | NOM | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tr | SCL/SDA rise time | 300 | ns | |||
| tf | SCL/SDA fall time | 300 | ns | |||
| tw(H) | SCL pulse width (high) | 600 | ns | |||
| tw(L) | SCL pulse width (low) | 1.3 | μs | |||
| tsu(STA) | Setup for repeated start | 600 | ns | |||
| td(STA) | Start to first falling edge of SCL | 600 | ns | |||
| tsu(DAT) | Data setup time | 100 | ns | |||
| th(DAT) | Data hold time | 0 | ns | |||
| tsu(STOP) | Setup time for stop | 600 | ns | |||
| tBUF | Bus free time between stop and start | 66 | μs | |||
| fSCL | Clock frequency | 400 | kHz | |||
Figure 6-2 I2C-Compatible Interface Timing Diagrams