ZHCSDC8A December 2014 – November 2017
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Register Reset | I2C Watchdog Timer Reset | CHG_CONFIG[1] | CHG_CONFIG[0] | SYS_MIN[2] | SYS_MIN[1] | SYS_MIN[0] | BOOST_LIM |
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
BIT | FIELD | TYPE | RESET | DESCRIPTION | NOTE |
---|---|---|---|---|---|
Bit 7 | Register Reset | R/W | 0 | 0 – Keep current register setting, 1 – Reset to default |
Default: Keep current register setting (0) Back to 0 after register reset |
Bit 6 | I2C Watchdog Timer Reset | R/W | 0 | 0 – Normal ; 1 – Reset | Default: Normal (0) Back to 0 after timer reset |
Charger Configuration | |||||
Bit 5 | CHG_CONFIG[1] | R/W | 0 | 00 – Charge Disable, 01 – Charge Battery, 10/11 – OTG |
Default: Charge Battery (01) |
Bit 4 | CHG_CONFIG[0] | R/W | 1 | ||
Minimum System Voltage Limit | |||||
Bit 3 | SYS_MIN[2] | R/W | 1 | 0.4 V | Offset: 3.0 V, Range 3.0 V to 3.7 V Default: 3.5 V (101) |
Bit 2 | SYS_MIN[1] | R/W | 0 | 0.2 V | |
Bit 1 | SYS_MIN[0] | R/W | 1 | 0.1 V | |
Boost Mode Current Limit | |||||
Bit 0 | BOOST_LIM | R/W | 1 | 0 – 500 mA, 1 – 1.3 A | Default: 1.3 A (1) |