ZHCSPA6F September 2006 – January 2022
PRODUCTION DATA
To read memory and generate the CRC at the 32-byte page boundaries of the BQ2022A, the SKIP ROM command is followed by the READ MEMORY/Generate CRC command, C3h, followed by the address low byte and then the address high byte.
An 8-bit CRC of the command byte and address bytes is computed by the BQ2022A and read back by the host to confirm that the correct command word and starting address were received. If the CRC read by the host is incorrect, a reset pulse must be issued and the entire sequence must be repeated. If the CRC received by the host is correct, the host issues read time slots and receives data from the BQ2022A starting at the initial address and continuing until the end of a 32-byte page is reached. At that point, the host sends eight additional read time slots and receive an 8-bit CRC that is the result of shifting into the CRC generator all of the data bytes from the initial starting byte to the last byte of the current page. Once the 8-bit CRC has been received, data is again read from the 1024-bit EPROM data field starting at the next page. This sequence continues until the final page and its accompanying CRC are read by the host. Thus each page of data can be considered to be 33 bytes long, the 32 bytes of user-programmed EPROM data and an 8-bit CRC that gets generated automatically at the end of each page.
| Initialization and SKIP ROM Command Sequence | READ MEMORY/Generate CRC Command | Address Low Byte | Address High Byte | Read and Verify CRC | EPROM Memory and CRC Byte Generated at 32-Byte Page Boundaries | ||
| C3h | A0 | A7 | A8 | A15 | |||
| NOTE: Individual bytes of address and data are transmitted LSB first. |