ZHCS181G August   2011  – April 2021 TPS53355

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings (1)
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Infomation
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 5-V LDO and VREG Start-Up
      2. 7.3.2 Adaptive On-Time D-CAP Control and Frequency Selection
      3. 7.3.3 Ramp Signal
      4. 7.3.4 Adaptive Zero Crossing
      5. 7.3.5 Power-Good
      6. 7.3.6 Current Sense, Overcurrent and Short Circuit Protection
      7. 7.3.7 Overvoltage and Undervoltage Protection
      8. 7.3.8 UVLO Protection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable, Soft Start, and Mode Selection
      2. 7.4.2 Auto-Skip Eco-mode™ Light Load Operation
      3. 7.4.3 Forced Continuous Conduction Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Small Signal Model
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application Circuit Diagram with Ceramic Output Capacitors
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 External Component Selection
          3. 8.2.1.2.3 External Component Selection Using All Ceramic Output Capacitors
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Application Circuit
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 External Component Selection
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 第三方产品免责声明
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DQP|22
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.3.5 Power-Good

The TPS53355 has power-good output that indicates high when switcher output is within the target. The power-good function is activated after soft-start has finished. If the output voltage becomes within +10% and –5% of the target value, internal comparators detect power-good state and the power-good signal becomes high after a 1-ms internal delay. If the output voltage goes outside of +15% or –10% of the target value, the power-good signal becomes low after two microsecond (2-μs) internal delay. The power-good output is an open drain output and must be pulled up externally.

The power-good MOSFET is powered through the VDD pin. VVDD must be >1 V in order to have a valid power-good logic. It is recommended to pull PGOOD up to VREG (or a voltage divided from VREG) so that the power-good logic is still valid even without VDD supply.