ZHCSLX3C June   2017  – September 2020 FPC402

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. 说明(续)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Host-Side Control Interface
      2. 8.3.2  LED Control
      3. 8.3.3  Low-Speed Output Signal Control
      4. 8.3.4  Low-Speed Input Status and Interrupt Generation
      5. 8.3.5  Downstream (Port-Side) I2C Master
      6. 8.3.6  Data Prefetch From Modules
      7. 8.3.7  Scheduled Write
      8. 8.3.8  Protocol Timeouts
      9. 8.3.9  General-Purpose Inputs and Outputs
      10. 8.3.10 Hot-Plug Support
    4. 8.4 Device Functional Modes
      1. 8.4.1 I2C Host-Side Control Interface
      2. 8.4.2 SPI Host-Side Control Interface
        1. 8.4.2.1 SPI Frame Structure
        2. 8.4.2.2 SPI Read Operation
        3. 8.4.2.3 SPI Write Operation
    5. 8.5 Programming
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 SFP/QSFP Port Management
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Sequencing
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Recommended Package Footprint
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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订购信息

General-Purpose Inputs and Outputs

The FPC402 has multiple general-purpose input and output pins which can be used to control auxiliary functions on the board through the same host-side control interface which is used to manage the ports. The GPIO pins can be configured as inputs or outputs through the FPC402 registers. One example use case for these GPIO pins is to control a power switch (that is, TPS2556 or TSP2557) to enable or disable power to the modules to manage power sequencing of the modules and prevent large inrush current at board power up.

A GPIO pin can be used with an external pullup resistor to drive low-voltage I/Os on other devices. When used in this fashion, the GPIO would drive VOL when set to logic 0, and when set to high-impedance (tri-state), the pullup resistor would pull the signal up to the appropriate I/O voltage. When using the GPIO pins for this purpose, it is important to drive the GPIOs to logic 0 and high-impedance only. Do not drive the GPIO to logic 1 as it would risk damaging the I/O of the connected device.

Figure 8-3 shows an example configuration for using the GPIOs to drive 1.2-V I/Os on another device.

GUID-25409D96-068B-494A-AD64-D53E8AF89FE3-low.gifFigure 8-3 Example Use Of External Pullups to Drive Low-I/O-Voltage Devices From GPIOs

The GPIO pins have a driver impedance of 10 Ω (typical). This is lower than the typical characteristic impedance of a transmission line and therefore may cause ringing due to the fast edge rate. The ringing duration is a function of the transmission line length and will typically be less than 100 ns. The magnitude of the overshoot is a function of the difference of driver impedance and impedance seen by the driver and may be as large as 5 V to GND for a transmission line with a characteristic impedance of 60 Ω. If ringing is a concern, a series resistor may be placed near the GPIO pin. A good rule of thumb for sizing the resistor is the difference of the transmission line characteristic impedance minus the driver impedance. For example, in the case of a 60 Ω transmission line impedance, a 50-Ω series resistor may be used to minimize ringing. Cases such as these may be simulated using the provided FPC402 IBIS model.