ZHCSD79A January 2015 – August 2019 ADS54J54
PRODUCTION DATA.
In the design of any application involving a high-speed data converter, particular attention should be paid the design of the analog input, the clocking solution, and careful layout of the clock and analog signals. In addition, the JESD204B interface means there now are high-speed serial lines that should be handled to preserve adequate signal integrity at the device that receives the sample data. The ADS54J54 evaluation module (EVM) is one practical example of the design of the analog input circuit and clocking solution, as well as a practical example of good circuit board layout practices around the ADC.