ZHCSD79A January 2015 – August 2019 ADS54J54
PRODUCTION DATA.
The ADS54J54 is a low power, wide bandwidth 14-bit 500 MSPS quad channel ADC. It supports the JESD204B serial interface with data rates up to 5.0 Gbps supporting 1 or 2 lanes per channel. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for system clock architecture design. The ADS54J54 provides excellent SFDR over a large input frequency range with low power consumption.