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TLV62065

現行

採用 2x2 SON 封裝的 3MHz、2A 降壓轉換器

現在提供此產品的更新版本

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功能相同,但引腳輸出與所比較的裝置不同
TPS62825 現行 採用 1.5-mm x 1.5-mm QFN 封裝,具有 1% 準確度的 2.4-V 至 5.5-V 輸入、2-A 降壓轉換器 Converter with higher voltage accuracy and lower IQ.

產品詳細資料

Rating Catalog Topology Buck Iout (max) (A) 2 Vin (max) (V) 5.5 Vin (min) (V) 2.9 Vout (max) (V) 5.5 Vout (min) (V) 0.8 Features Enable, Forced PWM, Light load efficiency, Output discharge, Spread Spectrum, Synchronous Rectification, UVLO fixed EMI features Spread Spectrum Control mode Voltage mode Operating temperature range (°C) -40 to 85 Iq (typ) (A) 0.018 Duty cycle (max) (%) 100
Rating Catalog Topology Buck Iout (max) (A) 2 Vin (max) (V) 5.5 Vin (min) (V) 2.9 Vout (max) (V) 5.5 Vout (min) (V) 0.8 Features Enable, Forced PWM, Light load efficiency, Output discharge, Spread Spectrum, Synchronous Rectification, UVLO fixed EMI features Spread Spectrum Control mode Voltage mode Operating temperature range (°C) -40 to 85 Iq (typ) (A) 0.018 Duty cycle (max) (%) 100
WSON (DSG) 8 4 mm² 2 x 2
  • VIN Range from 2.9 V to 5.5 V
  • Up to 97% Efficiency
  • Power-Save Mode / 3-MHz Fixed PWM Mode
  • Output Voltage Accuracy in PWM Mode ±2.0%
  • Output Capacitor Discharge Function
  • Typical 18-µA Quiescent Current
  • 100% Duty Cycle for Lowest Dropout
  • Available in a 2 mm × 2 mm × 0.75 mm WSON
  • APPLICATIONS
    • Point-of-Load (POL)
    • Notebooks, Pocket PCs
    • Portable Media Players
    • Set-Top Boxes

All other trademarks are the property of their respective owners

  • VIN Range from 2.9 V to 5.5 V
  • Up to 97% Efficiency
  • Power-Save Mode / 3-MHz Fixed PWM Mode
  • Output Voltage Accuracy in PWM Mode ±2.0%
  • Output Capacitor Discharge Function
  • Typical 18-µA Quiescent Current
  • 100% Duty Cycle for Lowest Dropout
  • Available in a 2 mm × 2 mm × 0.75 mm WSON
  • APPLICATIONS
    • Point-of-Load (POL)
    • Notebooks, Pocket PCs
    • Portable Media Players
    • Set-Top Boxes

All other trademarks are the property of their respective owners

The TLV62065 device is a high efficiency synchronous step-down DC–DC converter. It provides up to 2-A output current.

With an input voltage range of 2.9 V to 5.5 V, the device is a perfect fit for power conversion from a 5-V or 3.3-V system supply rail. The TLV62065 operates at 3-MHz fixed frequency and enters power-save mode operation at light load currents to maintain high efficiency over the entire load current range. For low noise applications, TLV62065 can be forced into fixed frequency PWM mode by pulling the MODE pin high.

In the shutdown mode, the current consumption is reduced to less than 1 µA and an internal circuit discharges the output capacitor.

TLV62065 operates with a 1-µH inductor and 10-µF output capacitor.

The TLV62065 is available in a small 2 mm × 2 mm × 0.75 mm 8-pin WSON package.

The TLV62065 device is a high efficiency synchronous step-down DC–DC converter. It provides up to 2-A output current.

With an input voltage range of 2.9 V to 5.5 V, the device is a perfect fit for power conversion from a 5-V or 3.3-V system supply rail. The TLV62065 operates at 3-MHz fixed frequency and enters power-save mode operation at light load currents to maintain high efficiency over the entire load current range. For low noise applications, TLV62065 can be forced into fixed frequency PWM mode by pulling the MODE pin high.

In the shutdown mode, the current consumption is reduced to less than 1 µA and an internal circuit discharges the output capacitor.

TLV62065 operates with a 1-µH inductor and 10-µF output capacitor.

The TLV62065 is available in a small 2 mm × 2 mm × 0.75 mm 8-pin WSON package.

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TPS62065 現行 採用 2x2 SON 封裝的 3MHz、2A 降壓轉換器 Pin compatible, extended features and parameters.

技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet TLV62065 3-MHz 2-A Step-Down Converter in 2 × 2 WSON Package datasheet (Rev. B) PDF | HTML 2015年 12月 23日
Application note QFN and SON PCB Attachment (Rev. C) PDF | HTML 2023年 12月 6日
Application note Quick Reference Guide To TI Buck Switching DC/DC Application Notes (Rev. B) PDF | HTML 2022年 5月 23日
Analog Design Journal Methods of output-voltage adjustment for DC/DC converters 2019年 6月 14日
Selection guide Power Management Guide 2018 (Rev. R) 2018年 6月 25日
Analog Design Journal Understanding 100% mode in low-power DC/DC converters 2018年 6月 22日
Analog Design Journal Achieving a clean startup by using a DC/DC converter with a precise enable-pin threshold 2017年 10月 24日
Application note Extending the Soft Start Time Without a Soft Start Pin (Rev. B) 2017年 6月 15日
Analog Design Journal Testing tips for applying external power to supply outputs without an input voltage 2016年 10月 24日
Analog Design Journal Five steps to a great PCB layout for a step-down converter 2015年 1月 29日
Application note An Accurate Thermal-Evaluation Method for the TLV62065 2014年 6月 4日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TLV62065EVM-719 — 採用 2x2 SON 封裝的 TLV62065 3MHz、2A 降壓轉換器的評估模組

The TLV62065EVM-719 is a fully assembled and tested platform for evaluating the performance of the TLV62065 2.0-A step-down converter. The user’s guide document includes schematic diagrams, printed circuit board (PCB) layout, bill of materials, and test data. Throughout this document, the (...)

使用指南: PDF
TI.com 無法提供
模擬型號

TPS62065 TINA-TI Start-Up Reference Design

SLVM148.TSC (894 KB) - TINA-TI Reference Design
模擬型號

TPS62065 TINA-TI Steady State Reference Design

SLVM149.TSC (895 KB) - TINA-TI Reference Design
模擬型號

TPS62065 TINA-TI Transient Spice Model

SLVM150.ZIP (81 KB) - TINA-TI Spice Model
模擬型號

TPS62065 Unencrypted PSpice Transient Model Package (Rev. B)

SLIM249B.ZIP (110 KB) - PSpice Model
計算工具

SLVC780 Design Tool for Output Voltage Adjustment Using a DAC

Calculator tool to adjust the power supply's output voltage with an analog input voltage
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參考設計

PMP8903 — 可提供 4.5V@5.5A 的車用系列 SEPIC 轉換器參考設計

In today’s start-stop systems, it is common for battery voltages to dip well below the nominal 12V rating. PMP8903 represents a very common start-stop application where that battery voltage can drop as low as 5V, and a 5V output is still needed for CAN and also as an intermediate bus. This (...)
Test report: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
WSON (DSG) 8 Ultra Librarian

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