LMX2571
- Any Frequency from 10 MHz to 1344 MHz
- Low Phase Noise and Spurs
- –123 dBc/Hz at 12.5 kHz Offset at 480 MHz
- –145 dBc/Hz at 1 MHz Offset at 480 MHz
- Normalized PLL Noise Floor of –231 dBc/Hz
- Spurious Better Than –75 dBc/Hz
- New FastLock to Reduce Lock Time
- A Novel Technique to Remove Integer Boundary
Spurs - Integrated 5-V Charge Pump and Output Divider
for External VCO Operation - 2-, 4- and 8-Level or Arbitrary Level Direct Digital
FSK Modulation - One TX/RX Output or Two Fanout Outputs
- Crystal, XO or Differential Reference Clock Input
- Low Current Consumption
- 39-mA Typical Synthesizer Mode (Internal
VCO) - 9-mA Typical PLL Mode (External VCO)
- 39-mA Typical Synthesizer Mode (Internal
- 24-Bit Fractional-N Delta Sigma Modulator
The LMX2571 is a low-power, high-performance, wideband PLLatinum RF synthesizer that integrates a delta-sigma fractional N PLL, multiple core voltage-controlled oscillator (VCO), programmable output dividers and two output buffers. The VCO cores work up to 5.376 GHz resulting in continuous output frequency range of 10 MHz to 1344 MHz.
This synthesizer can also be used with an external VCO. To that end, a dedicated 5-V charge pump and an output divider are available for this configuration.
A unique programmable multiplier is also incorporated to help improve spurs, allowing the system to use every channel even if it falls on an integer boundary.
The output has an integrated SPDT switch that can be used as a transmit/receive switch in FDD radio application. Both outputs can also be turned on to provide 2 outputs at the same time.
The LMX2571 supports direct digital FSK modulation through programming or pins. Discrete level FSK, pulse shaping FSK, and analog FM modulation are supported.
A new FastLock technique can be used allowing the user to step from one frequency to the next in less than 1.5 ms even when an external VCO is used with a narrow band loop filter.
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技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | LMX2571 Low-Power, High-Performance PLLatinum RF Synthesizer with FSK Modulation 数据表 (Rev. A) | PDF | HTML | 2016-6-1 | ||
| 应用手册 | 能为下一个高速转换器设计带来优势的实用时钟注意事项 (Rev. A) | PDF | HTML | 英语版 (Rev.A) | PDF | HTML | 2025-4-29 | |
| 应用简报 | 射频合成器资源汇编 | PDF | HTML | 英语版 | PDF | HTML | 2024-10-23 | |
| 技术文章 | LMX2571的杂散性能优化方法 | PDF | HTML | 2024-7-24 | |||
| 应用手册 | 支持快速锁定的射频锁相环LMX2571在双时隙通信DMR数字对讲机中的应用 | 2018-5-11 | ||||
| 技术文章 | How to implement FM modulation | PDF | HTML | 2017-8-3 | |||
| 应用手册 | Frequency Shift Keying with LMX2571 | 2017-5-30 | ||||
| 应用手册 | LMX2571 Using a Programmable Input Multiplier to Minimize Integer Boundary Spurs | PDF | HTML | 2016-1-12 | |||
| 技术文章 | Timing is Everything: Improving integer boundary spurs in fractional PLL synthesiz | PDF | HTML | 2015-8-5 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
LMX2571EVM — LMX2571 1.34GHz 低功耗极端温度 RF 合成器评估模块
LMX2571EVM 评估板适用于 LMX2571 器件，该器件是一个具有低噪声、高性能集成式 VCO 的频率合成器。VCO 内核是一个低噪声 5GHz VCO，经过输出通道分频器之后，分频频率为 10MHz 至 1400MHz。
内部 VCO 可旁路，允许使用外部 VCO。一个独立的 5V 电荷泵专门用于外部 VCO，无需使用运算放大器来支持 5V VCO。外部 VCO 的输出还可经由另一个输出通道分频器。
LMX2571EVM 可通过 (1) SPI 编程、(2) I2S 编程和 (3) PIN 模式进行编程。PIN 模式支持高达 8 电平 FSK 调制。此板可由 5V 外部电源供电。
TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
德州仪器 (TI) 时钟和合成器 (TICS) 专业软件用于对具有以下前缀的产品编号的评估模块 (EVM) 进行编程：CDC、LMK 和 LMX。这些产品包括锁相环和电压控制振荡器 (PLL+VCO)、合成器和时钟器件。
CLOCK-TREE-ARCHITECT — 时钟树架构编程软件
时钟树架构是一款时钟树综合工具，可根据您的系统要求生成时钟树解决方案，从而帮助您简化设计流程。该工具从庞大的时钟产品数据库中提取数据，然后生成系统级多芯片时钟解决方案。
PLLATINUMSIM-SW — PLL 环路滤波器、相位噪声、锁定时间和杂散模拟工具
PLLATINUMSIM-SW 是一款仿真工具，允许用户创建我们 PLLatinum™ 集成电路的详细设计和仿真，其中包括 LMX 系列锁相环 (PLL) 和合成器。
TIDA-00886 — 以单节电池运行的低功耗射频 PLL 合成器参考设计
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| WQFN (NJK) | 36 | Ultra Librarian |
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