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参数

Function Clock synthesizer Number of outputs 9 Output frequency (Max) (MHz) 230 Core supply voltage (V) 1.8 Output supply voltage (V) 2.5, 3.3 Input type XTAL, LVCMOS Output type LVCMOS Operating temperature range (C) -40 to 85 Features Integrated EEPROM, Multiplier or divider, Spread-spectrum clocking (SSC) Rating Catalog open-in-new 查找其它 时钟发生器

封装|引脚|尺寸

TSSOP (PW) 24 34 mm² 4.4 x 7.8 open-in-new 查找其它 时钟发生器

特性

  • Member of Programmable Clock Generator Family
    • CDCEx913: 1 PLLs, 3 Outputs
    • CDCEx925: 2 PLLs, 5 Outputs
    • CDCEx937: 3 PLLs, 7 Outputs
    • CDCEx949: 4 PLLs, 9 Outputs
  • In-System Programmability and EEPROM
    • Serial Programmable Volatile Register
    • Nonvolatile EEPROM to Store Customer Settings
  • Flexible Input Clocking Concept
    • External Crystal: 8 to 32 MHz
    • On-Chip VCXO: Pull-Range ±150 ppm
    • Single-Ended LVCMOS Up to 160 MHz
  • Free Selectable Output Frequency Up to 230 MHz
  • Low-Noise PLL Core
    • PLL Loop Filter Components Integrated
    • Low Period Jitter (Typical 60 ps)
  • Separate Output Supply Pins
    • CDCE949: 3.3 V and 2.5 V
    • CDCEL949: 1.8 V
  • Flexible Clock Driver
    • Three User-Definable Control Inputs [S0/S1/S2], for Example, SSC Selection, Frequency Switching, Output Enable or Power Down
    • Generates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth®, WLAN, Ethernet™, and GPS
    • Generates Common Clock Frequencies Used With TI-DaVinci™, OMAP™, DSPs
    • Programmable SSC Modulation
    • Enables 0-PPM Clock Generation
  • 1.8-V Device Core Supply
  • Wide Temperature Range: –40°C to 85°C
  • Packaged in TSSOP
  • Development and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock™)
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描述

The CDCE949 and CDCEL949 are modular PLL-based low cost, high-performance, programmable clock synthesizers, multipliers and dividers. They generate up to 9 output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using up to four independent configurable PLLs.

The CDCEx949 has separate output supply pins, VDDOUT, 1.8 V for the CDCEL949, and 2.5 V to 3.3 V for CDCE949.

The input accepts an external crystal or LVCMOS clock signal. If an external crystal is used, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20 pF. Additionally, an on-chip VCXO is selectable, allowing synchronization of the output frequency to an external control signal, that is, a PWM signal.

The deep M/N divider ratio allows the generation of zero-ppm audio or video, networking (WLAN, BlueTooth™, Ethernet, GPS) or Interface (USB, IEEE1394, Memory Stick) clocks from a reference input frequency, such as 27 MHz.

All PLLs support SSC (Spread-Spectrum Clocking). SSC can be Center-Spread or Down-Spread clocking. This is a common technique to reduce electro-magnetic interference (EMI).

Based on the PLL frequency and the divider settings, the internal loop-filter components are automatically adjusted to achieve high stability, and to optimize the jitter-transfer characteristics of each PLL.

The device supports non-volatile EEPROM programming for easy customization of the device to the application. It is preset to a factory-default configuration. It can be reprogrammed to a different application configuration before PCB assembly, or reprogrammed by in-system programming. All device settings are programmable through the SDA and SCL bus, a 2-wire serial interface.

Three programmable control inputs, S0, S1 and S2, can be used to control various aspects of operation including frequency selection, changing the SSC parameters to lower EMI, PLL bypass, power down, and choosing between low level or 3-state for the output-disable function.

The CDCEx949 operates in a 1.8-V environment. It operates within a temperature range of –40°C to 85°C.

open-in-new 查找其它 时钟发生器
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技术文档

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类型 标题 下载最新的英文版本 发布
* 数据表 CDCE(L)913: Flexible Low Power LVCMOS Clock Generator With SSC Support for EMI Reduction 数据表 2016年 10月 27日
技术文章 The five benefits of multiple-personality clocking devices 2016年 5月 17日
技术文章 How to select an optimal clocking solution for your FPGA-based design 2015年 12月 9日
技术文章 Clocking sampled systems to minimize jitter 2014年 7月 31日
技术文章 Timing is Everything: How to optimize clock distribution in PCIe applications 2014年 3月 28日
应用手册 VCXO Application Guideline for CDCE(L)9xx Family 2012年 4月 23日
用户指南 CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual 2010年 11月 22日
用户指南 CDCE(L)9xx Performance Evaluation Module 2010年 7月 7日
应用手册 General I2C / EEPROM usage for the CDCE(L)9xx family 2010年 1月 26日
应用手册 Troubleshooting I2C 2009年 10月 19日
应用手册 Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913 2009年 9月 23日
用户指南 CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual 2008年 12月 9日
应用手册 Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency 2008年 3月 31日
应用手册 Practical consideration on choosing a crystal for CDCE(L)9xx family 2008年 3月 24日
应用手册 Clocking Recommendations for DM6446 Digital Video EVM with Sngle PLL 2007年 8月 8日

设计与开发

有关其他条款或所需资源,请点击下面的任何链接来查看详情页面。

硬件开发

评估板 下载
CDCE949 性能评估模块
CDCE949PERF-EVM
document-generic 用户指南
$149.00
说明

The CDCE949Perf-Evaluation Module will help to verify the functionality and performance of CDCE949 with the options of crystal and 1.8 V LVCMOS inputs. The outputs can be connected to the Oscilloscope directly with SMA cables. The below information/items can be included The EVM use’s (...)

特性
  • Easy-to-use evaluation module for fast prototyping and application evaluation.
  • Supporting the entire clock family.
  • Easy and fast device programming through TI Pro-ClockT software.
  • Evaluation of multiple crystals and reference clocks due to flexible input structure.
  • EVM completely USB powered in factory (...)
评估板 下载
$99.00
说明

CDCE(L)949 系列时钟发生器集成了 EEPROM,允许在启动后保存默认频率设置。CDCEL9XXPROGEVM 是允许对原型样片或小批量生产进行快速编程的编程板。它适用于该系列的全部 8 款器件:CDCE949、CDCE937、CDCE925、CDCE913、CDCEL949、CDCEL937、CDCEL925 和 CDCEL913,并且带有易于使用的通用插座。

此外还提供另一个用于性能测试和评估的 EVM,其器件型号为 CDCE(L)9xxPERF-EVM,此性能评估模块适用于每个单独器件。

用于评估模块 (EVM) 的 GUI 下载
SCAC073F.ZIP (88940 KB)

软件开发

驱动程序和库 下载
SCAC131.ZIP (77 KB)
编程工具 下载
ClockPro™ 程序设计软件
CLOCKPRO TI's ClockPro software allows users to program/configure the following devices in a friendly GUI interface:
  • CDCE949
  • CDCE937
  • CDCE925
  • CDCE913
  • CDCE906
  • CDCE706
  • CDCEL949
  • CDCEL937
  • CDCEL925
  • CDCEL913

It is intended to be used with the evaluation modules of the above devices.

特性
  • Easy and fast device programming through EEPROM, I2C
  • Based on Labview
支持软件 下载
SCAC119E.ZIP (4405 KB)

设计工具和仿真

仿真模型 下载
SCAC094B.ZIP (42 KB) - IBIS Model

参考设计

参考设计 下载
Ultrasound smart probe power supply reference design
TIDA-010057 — 医疗成像领域的巨大技术进步和高集成度,特别是手持式超声波智能探头的出现,促使工程师开发出高效率、抗噪声的小尺寸电源解决方案。此参考设计阐述了端到端电源和数据解决方案,适用于我们采用 TX7332 发送芯片和 (...)
document-generic 原理图 document-generic 用户指南

CAD/CAE 符号

封装 引脚 下载
TSSOP (PW) 24 了解详情

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