7 基于硬件事件停止正在运行的计时器

使用硬件事件可停止正在运行的计时器，实现对计时功能的低延迟、精确和自主控制。这可以实时测量和响应，在检测、安全和控制系统中至关重要。图 7-1 展示了用于停止正在运行的计时器的流程图。

图 7-1 表示硬件如何停止正在运行的计时器的流程图

可以完成高级计时器 (TIMA) 中的以下配置来实现此要求：

• 配置 TIMA 以在发生 CC 事件时生成自交叉触发。
• 配置 CC0 以进行上升沿捕获。CC0 引脚上的外部上升沿将生成 CC0 事件和自交叉触发。
• 为所使用的 TIMA 实例配置基于硬件的故障检测机制。
• 将 FCTL.TFIM 位配置为“1”，意味着所选触发将参与故障条件生成，这将导致交叉触发生成故障条件以停止计时器。
• 将 FCTL.FL 配置为“1”以启用故障锁存模式，这意味着整体故障条件取决于 CPU_INT.RIS.F 位。
• 配置故障响应为暂停计数器，这将停止正在运行的计数器。

/* Configuration Sequence to Stop a Running Timer Using Hardware Events */
static const DL_TimerA_ClockConfig gPWM_0ClockConfig = {
    .clockSel = DL_TIMER_CLOCK_BUSCLK,
    .divideRatio = DL_TIMER_CLOCK_DIVIDE_1,
    .prescale = 0U
};

static const DL_TimerA_PWMConfig gPWM_0Config = {
    .pwmMode = DL_TIMER_PWM_MODE_EDGE_ALIGN_UP,
    .period = 1600,
    .isTimerWithFourCC = false,
    .startTimer = DL_TIMER_STOP,
};
SYSCONFIG_WEAK void SYSCFG_DL_PWM_0_init(void) {

    DL_TimerA_setClockConfig(
        PWM_0_INST, (DL_TimerA_ClockConfig *) &gPWM_0ClockConfig);
    DL_TimerA_initPWMMode(
        PWM_0_INST, (DL_TimerA_PWMConfig *) &gPWM_0Config);
    // Set Counter control to the smallest CC index being used
    DL_TimerA_setCounterControl(PWM_0_INST,DL_TIMER_CZC_CCCTL0_ZCOND,DL_TIMER_CAC_CCCTL0_ACOND,DL_TIMER_CLC_CCCTL0_LCOND);

    DL_TimerA_setCaptCompUpdateMethod(PWM_0_INST, DL_TIMER_CC_UPDATE_METHOD_IMMEDIATE, DL_TIMERA_CAPTURE_COMPARE_0_INDEX);

    DL_TimerA_setCaptureCompareOutCtl(PWM_0_INST, DL_TIMER_CC_OCTL_INIT_VAL_LOW,
		DL_TIMER_CC_OCTL_INV_OUT_DISABLED, DL_TIMER_CC_OCTL_SRC_FUNCVAL,
		DL_TIMERA_CAPTURE_COMPARE_1_INDEX);

    DL_TimerA_setCaptCompUpdateMethod(PWM_0_INST, DL_TIMER_CC_UPDATE_METHOD_IMMEDIATE, DL_TIMERA_CAPTURE_COMPARE_1_INDEX);
    DL_TimerA_setCaptureCompareValue(PWM_0_INST, 500, DL_TIMER_CC_1_INDEX);//Set CC1 value, this is to generate PWM using CC1

//Configure Fault such that Cross Trigger generates a fault condition, which will be latched unless the Fault RIS is cleared
    DL_TimerA_setFaultConfig(PWM_0_INST, DL_TIMER_FAULT_CONFIG_TFIM_ENABLED|DL_TIMER_FAULT_CONFIG_FL_LATCH_SW_CLR|
                                         DL_TIMER_FAULT_CONFIG_FI_DEPENDENT|DL_TIMER_FAULT_CONFIG_FIEN_ENABLED);

    DL_TimerA_configFaultOutputAction(PWM_0_INST,
                                      DL_TIMER_FAULT_ENTRY_CCP_HIGH,
                                      DL_TIMER_FAULT_EXIT_CCP_LOW, DL_TIMER_CC_1_INDEX);
//Generating a Fault condition will stop the Counter if Fault Entry Action is set as Fault Counter Suspend Counting
    DL_TimerA_configFaultCounter(PWM_0_INST,
                                 DL_TIMERA_FAULT_ENTRY_CTR_SUSP_COUNT,
                                 DL_TIMERA_FAULT_EXIT_CTR_CVAE_ACTION);
    DL_TimerA_setFaultSourceConfig(
            PWM_0_INST, DL_TIMERA_FAULT_SOURCE_EXTERNAL_0_SENSE_HIGH);
    PWM_0_INST->COUNTERREGS.CCCTL_01[0]=0x20001;//CC0 configured for rising edge capture
    DL_TimerA_enableClock(PWM_0_INST);
    DL_TimerA_setCCPDirection(PWM_0_INST ,  DL_TIMER_CC1_OUTPUT );
    DL_TimerA_configCrossTrigger(PWM_0_INST, DL_TIMER_CROSS_TRIG_SRC_CCU0,
                                 DL_TIMER_CROSS_TRIGGER_INPUT_ENABLED, DL_TIMER_CROSS_TRIGGER_MODE_ENABLED
		);//Configuration to Generate Hardware Based Cross Trigger on CC0 Event
    DL_TimerA_setCaptureCompareInput(PWM_0_INST, DL_TIMER_CC_INPUT_INV_NOINVERT, DL_TIMER_CC_IN_SEL_TRIG, DL_TIMER_CC_1_INDEX);
    DL_TimerA_setExternalTriggerEvent(PWM_0_INST,DL_TIMER_EXT_TRIG_SEL_TRIG_1);//This is to receive the self cross trigger generated by TIMA1
    DL_TimerA_enableExternalTrigger(PWM_0_INST);
}