ZHCU831 November   2021 AWR2944

 

  1.   说明
  2.   资源
  3.   特性
  4.   应用
  5.   5
  6. 1System Description
    1. 1.1 Why use Radar?
    2. 1.2 TI Corner Radar Design
    3. 1.3 Key System Specification
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 AWR2944 Single-Chip Radar Solution
      2. 2.3.2 AWR2944 Evaluation Module
    4. 2.4 System Design Theory
      1. 2.4.1  Antenna Configuration
      2. 2.4.2  Chirp Configuration and System Performance
      3. 2.4.3  Data Path
      4. 2.4.4  Chirp Timing
      5. 2.4.5  eDMA Configuration
      6. 2.4.6  Memory Allocation
      7. 2.4.7  DDMA
      8. 2.4.8  Empty Subband Based DDMA
      9. 2.4.9  RANSAC
      10. 2.4.10 Group Tracker
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
      2. 3.1.2 Software and GUI
    2. 3.2 Test Setup
    3. 3.3 Test Results
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 支持资源
    5. 4.5 Trademarks
  10. 5About the Author

2.4.4 Chirp Timing

Figure 2-5 shows the timing of the chirps and subsequent processing in the system.


GUID-20211110-SS0I-KGF6-FDH8-GFMTWK0GQMB2-low.gif

Figure 2-5 Chirp Timing Sequence

Chirp acquisition happens in the radar front end. The front end is configured via mmwavelink in accordance with the chirp configuration.

The core of the data path processing - from chirp acquisition to pointcloud output is divided into the following high-level blocks: rangeproc data processing unit (DPU), dopplerproc-DDMA DPU, elevation FFT, and finalization.

As the acquisition occurs, rangeproc DPU calculates the first dimensional FFT chirp-by-chirp in parallel to the acquisition, compresses the output, and stores it in memory as the compressed radarcube.

Next, the dopplerproc-DDMA DPU decompresses the radarcube one slice at a time and calculates for each slice both velocity and azimuth angle information by taking appropriate FFTs. The dopplerproc-DDMA DPU also performs DDMA demodulation to get the correct velocity out of six possible hypotheses as per the DDMA scheme. Finally, the dopplerproc-DDMA DPU also computes range CFAR and local maximum along range. The dopplerproc-DDMA DPU combines these to produce the object list. The dopplerproc-DDMA DPU utilizes both the hardware accelerator and DSP parallelly to achieve this.

After this step, the elevation FFT is performed on the DSP, followed by the finalization step that computes the Cartesian coordinates and velocity of the detected objects.

After this, RANSAC and GTrack algorithms run on the MSS to produce a target list for the scene. A brief overview of these algorithms is given in later sections. As Figure 2-5 shows, this part of the processing overruns into the next frame. This overrun is by design as it enables the parallel utilization of MSS for GTrack, RANSAC, and data transmission over UART while the rest of the processing happens on HWA+DSP for the next frame.

For more details on the application flow and processing, see the mmWave software development kit (SDK).