ZHCU831 November   2021 AWR2944

 

  1.   说明
  2.   资源
  3.   特性
  4.   应用
  5.   5
  6. 1System Description
    1. 1.1 Why use Radar?
    2. 1.2 TI Corner Radar Design
    3. 1.3 Key System Specification
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 AWR2944 Single-Chip Radar Solution
      2. 2.3.2 AWR2944 Evaluation Module
    4. 2.4 System Design Theory
      1. 2.4.1  Antenna Configuration
      2. 2.4.2  Chirp Configuration and System Performance
      3. 2.4.3  Data Path
      4. 2.4.4  Chirp Timing
      5. 2.4.5  eDMA Configuration
      6. 2.4.6  Memory Allocation
      7. 2.4.7  DDMA
      8. 2.4.8  Empty Subband Based DDMA
      9. 2.4.9  RANSAC
      10. 2.4.10 Group Tracker
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
      2. 3.1.2 Software and GUI
    2. 3.2 Test Setup
    3. 3.3 Test Results
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 支持资源
    5. 4.5 Trademarks
  10. 5About the Author

2.3.1 AWR2944 Single-Chip Radar Solution

TI’s AWR2243 is a 76-GHz to 81-GHz automotive second-generation high-performance MMIC. The device is a cost-competitive single-chip MMIC to win high performance mid-end and high-end corner radars meeting 170 m plus NCAP safety requirements.

The AWR2944 is an integrated single-chip, frequency modulated continuous wave (FMCW) sensor capable of operation in the 76-GHz to 81-GHz frequency band. The device is built with TI’s low-power, 45-nm RFCMOS processor and enables unprecedented levels of analog and digital integration in an extremely small form factor. The device has four receivers and four transmitters with a closed-loop phase-locked loop (PLL) for precise and linear chirp synthesis. The sensor includes a built-in radio processor (BIST) for RF calibration and safety monitoring. Based on complex baseband architecture, the sensor device supports an IF bandwidth of 15 MHz with reconfigurable output sampling rates. The presence of Arm® Cortex® R5F, TI's C66x Digital Signal Processor (DSP) (fixed and floating point) and Hardware Accelerator (HWA 2.0) along with 4MB* of on-chip RAM enables high-level algorithm development.