ZHCSJX6C June   2019  – September 2024 ADS7038 , ADS7038H

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Multiplexer and ADC
      2. 7.3.2  Reference
      3. 7.3.3  ADC Transfer Function
      4. 7.3.4  ADC Offset Calibration
      5. 7.3.5  Programmable Averaging Filter
      6. 7.3.6  General-Purpose I/Os
      7. 7.3.7  Oscillator and Timing Control
      8. 7.3.8  CRC on Data Interface
        1. 7.3.8.1 Input CRC (From Host To Device)
        2. 7.3.8.2 Output CRC (From Device to Host)
      9. 7.3.9  Output Data Format
        1. 7.3.9.1 Status Flags
      10. 7.3.10 Digital Window Comparator
        1. 7.3.10.1 Interrupts From Digital Inputs
        2. 7.3.10.2 Triggering Digital Outputs with Alert and ZCD
      11. 7.3.11 Minimum, Maximum, and Latest Data Registers
      12. 7.3.12 Device Programming
        1. 7.3.12.1 Enhanced-SPI Interface
        2. 7.3.12.2 Register Read/Write Operation
          1. 7.3.12.2.1 Register Write
          2. 7.3.12.2.2 Register Read
            1. 7.3.12.2.2.1 Register Read With CRC
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Power-Up and Reset
      2. 7.4.2 Manual Mode
      3. 7.4.3 On-the-Fly Mode
      4. 7.4.4 Auto-Sequence Mode
      5. 7.4.5 Autonomous Mode
      6. 7.4.6 Turbo Comparator Mode
  9. 8 Register Map
    1. 8.1 ADS7038 Registers
      1. 8.1.1   SYSTEM_STATUS Register (Address = 0x0) [reset = 0x81]
      2. 8.1.2   GENERAL_CFG Register (Address = 0x1) [reset = 0x0]
      3. 8.1.3   DATA_CFG Register (Address = 0x2) [reset = 0x0]
      4. 8.1.4   OSR_CFG Register (Address = 0x3) [reset = 0x0]
      5. 8.1.5   OPMODE_CFG Register (Address = 0x4) [reset = 0x0]
      6. 8.1.6   PIN_CFG Register (Address = 0x5) [reset = 0x0]
      7. 8.1.7   GPIO_CFG Register (Address = 0x7) [reset = 0x0]
      8. 8.1.8   GPO_DRIVE_CFG Register (Address = 0x9) [reset = 0x0]
      9. 8.1.9   GPO_VALUE Register (Address = 0xB) [reset = 0x0]
      10. 8.1.10  GPI_VALUE Register (Address = 0xD) [reset = 0x0]
      11. 8.1.11  SEQUENCE_CFG Register (Address = 0x10) [reset = 0x0]
      12. 8.1.12  CHANNEL_SEL Register (Address = 0x11) [reset = 0x0]
      13. 8.1.13  AUTO_SEQ_CH_SEL Register (Address = 0x12) [reset = 0x0]
      14. 8.1.14  ALERT_CH_SEL Register (Address = 0x14) [reset = 0x0]
      15. 8.1.15  ALERT_MAP Register (Address = 0x16) [reset = 0x0]
      16. 8.1.16  ALERT_PIN_CFG Register (Address = 0x17) [reset = 0x0]
      17. 8.1.17  EVENT_FLAG Register (Address = 0x18) [reset = 0x0]
      18. 8.1.18  EVENT_HIGH_FLAG Register (Address = 0x1A) [reset = 0x0]
      19. 8.1.19  EVENT_LOW_FLAG Register (Address = 0x1C) [reset = 0x0]
      20. 8.1.20  EVENT_RGN Register (Address = 0x1E) [reset = 0x0]
      21. 8.1.21  HYSTERESIS_CH0 Register (Address = 0x20) [reset = 0xF0]
      22. 8.1.22  HIGH_TH_CH0 Register (Address = 0x21) [reset = 0xFF]
      23. 8.1.23  EVENT_COUNT_CH0 Register (Address = 0x22) [reset = 0x0]
      24. 8.1.24  LOW_TH_CH0 Register (Address = 0x23) [reset = 0x0]
      25. 8.1.25  HYSTERESIS_CH1 Register (Address = 0x24) [reset = 0xF0]
      26. 8.1.26  HIGH_TH_CH1 Register (Address = 0x25) [reset = 0xFF]
      27. 8.1.27  EVENT_COUNT_CH1 Register (Address = 0x26) [reset = 0x0]
      28. 8.1.28  LOW_TH_CH1 Register (Address = 0x27) [reset = 0x0]
      29. 8.1.29  HYSTERESIS_CH2 Register (Address = 0x28) [reset = 0xF0]
      30. 8.1.30  HIGH_TH_CH2 Register (Address = 0x29) [reset = 0xFF]
      31. 8.1.31  EVENT_COUNT_CH2 Register (Address = 0x2A) [reset = 0x0]
      32. 8.1.32  LOW_TH_CH2 Register (Address = 0x2B) [reset = 0x0]
      33. 8.1.33  HYSTERESIS_CH3 Register (Address = 0x2C) [reset = 0xF0]
      34. 8.1.34  HIGH_TH_CH3 Register (Address = 0x2D) [reset = 0xFF]
      35. 8.1.35  EVENT_COUNT_CH3 Register (Address = 0x2E) [reset = 0x0]
      36. 8.1.36  LOW_TH_CH3 Register (Address = 0x2F) [reset = 0x0]
      37. 8.1.37  HYSTERESIS_CH4 Register (Address = 0x30) [reset = 0xF0]
      38. 8.1.38  HIGH_TH_CH4 Register (Address = 0x31) [reset = 0xFF]
      39. 8.1.39  EVENT_COUNT_CH4 Register (Address = 0x32) [reset = 0x0]
      40. 8.1.40  LOW_TH_CH4 Register (Address = 0x33) [reset = 0x0]
      41. 8.1.41  HYSTERESIS_CH5 Register (Address = 0x34) [reset = 0xF0]
      42. 8.1.42  HIGH_TH_CH5 Register (Address = 0x35) [reset = 0xFF]
      43. 8.1.43  EVENT_COUNT_CH5 Register (Address = 0x36) [reset = 0x0]
      44. 8.1.44  LOW_TH_CH5 Register (Address = 0x37) [reset = 0x0]
      45. 8.1.45  HYSTERESIS_CH6 Register (Address = 0x38) [reset = 0xF0]
      46. 8.1.46  HIGH_TH_CH6 Register (Address = 0x39) [reset = 0xFF]
      47. 8.1.47  EVENT_COUNT_CH6 Register (Address = 0x3A) [reset = 0x0]
      48. 8.1.48  LOW_TH_CH6 Register (Address = 0x3B) [reset = 0x0]
      49. 8.1.49  HYSTERESIS_CH7 Register (Address = 0x3C) [reset = 0xF0]
      50. 8.1.50  HIGH_TH_CH7 Register (Address = 0x3D) [reset = 0xFF]
      51. 8.1.51  EVENT_COUNT_CH7 Register (Address = 0x3E) [reset = 0x0]
      52. 8.1.52  LOW_TH_CH7 Register (Address = 0x3F) [reset = 0x0]
      53. 8.1.53  RESERVED Register (Address = 0x4E) [reset = 0x0]
      54. 8.1.54  MAX_CH0_LSB Register (Address = 0x60) [reset = 0x0]
      55. 8.1.55  MAX_CH0_MSB Register (Address = 0x61) [reset = 0x0]
      56. 8.1.56  MAX_CH1_LSB Register (Address = 0x62) [reset = 0x0]
      57. 8.1.57  MAX_CH1_MSB Register (Address = 0x63) [reset = 0x0]
      58. 8.1.58  MAX_CH2_LSB Register (Address = 0x64) [reset = 0x0]
      59. 8.1.59  MAX_CH2_MSB Register (Address = 0x65) [reset = 0x0]
      60. 8.1.60  MAX_CH3_LSB Register (Address = 0x66) [reset = 0x0]
      61. 8.1.61  MAX_CH3_MSB Register (Address = 0x67) [reset = 0x0]
      62. 8.1.62  MAX_CH4_LSB Register (Address = 0x68) [reset = 0x0]
      63. 8.1.63  MAX_CH4_MSB Register (Address = 0x69) [reset = 0x0]
      64. 8.1.64  MAX_CH5_LSB Register (Address = 0x6A) [reset = 0x0]
      65. 8.1.65  MAX_CH5_MSB Register (Address = 0x6B) [reset = 0x0]
      66. 8.1.66  MAX_CH6_LSB Register (Address = 0x6C) [reset = 0x0]
      67. 8.1.67  MAX_CH6_MSB Register (Address = 0x6D) [reset = 0x0]
      68. 8.1.68  MAX_CH7_LSB Register (Address = 0x6E) [reset = 0x0]
      69. 8.1.69  MAX_CH7_MSB Register (Address = 0x6F) [reset = 0x0]
      70. 8.1.70  MIN_CH0_LSB Register (Address = 0x80) [reset = 0xFF]
      71. 8.1.71  MIN_CH0_MSB Register (Address = 0x81) [reset = 0xFF]
      72. 8.1.72  MIN_CH1_LSB Register (Address = 0x82) [reset = 0xFF]
      73. 8.1.73  MIN_CH1_MSB Register (Address = 0x83) [reset = 0xFF]
      74. 8.1.74  MIN_CH2_LSB Register (Address = 0x84) [reset = 0xFF]
      75. 8.1.75  MIN_CH2_MSB Register (Address = 0x85) [reset = 0xFF]
      76. 8.1.76  MIN_CH3_LSB Register (Address = 0x86) [reset = 0xFF]
      77. 8.1.77  MIN_CH3_MSB Register (Address = 0x87) [reset = 0xFF]
      78. 8.1.78  MIN_CH4_LSB Register (Address = 0x88) [reset = 0xFF]
      79. 8.1.79  MIN_CH4_MSB Register (Address = 0x89) [reset = 0xFF]
      80. 8.1.80  MIN_CH5_LSB Register (Address = 0x8A) [reset = 0xFF]
      81. 8.1.81  MIN_CH5_MSB Register (Address = 0x8B) [reset = 0xFF]
      82. 8.1.82  MIN_CH6_LSB Register (Address = 0x8C) [reset = 0xFF]
      83. 8.1.83  MIN_CH6_MSB Register (Address = 0x8D) [reset = 0xFF]
      84. 8.1.84  MIN_CH7_LSB Register (Address = 0x8E) [reset = 0xFF]
      85. 8.1.85  MIN_CH7_MSB Register (Address = 0x8F) [reset = 0xFF]
      86. 8.1.86  RECENT_CH0_LSB Register (Address = 0xA0) [reset = 0x0]
      87. 8.1.87  RECENT_CH0_MSB Register (Address = 0xA1) [reset = 0x0]
      88. 8.1.88  RECENT_CH1_LSB Register (Address = 0xA2) [reset = 0x0]
      89. 8.1.89  RECENT_CH1_MSB Register (Address = 0xA3) [reset = 0x0]
      90. 8.1.90  RECENT_CH2_LSB Register (Address = 0xA4) [reset = 0x0]
      91. 8.1.91  RECENT_CH2_MSB Register (Address = 0xA5) [reset = 0x0]
      92. 8.1.92  RECENT_CH3_LSB Register (Address = 0xA6) [reset = 0x0]
      93. 8.1.93  RECENT_CH3_MSB Register (Address = 0xA7) [reset = 0x0]
      94. 8.1.94  RECENT_CH4_LSB Register (Address = 0xA8) [reset = 0x0]
      95. 8.1.95  RECENT_CH4_MSB Register (Address = 0xA9) [reset = 0x0]
      96. 8.1.96  RECENT_CH5_LSB Register (Address = 0xAA) [reset = 0x0]
      97. 8.1.97  RECENT_CH5_MSB Register (Address = 0xAB) [reset = 0x0]
      98. 8.1.98  RECENT_CH6_LSB Register (Address = 0xAC) [reset = 0x0]
      99. 8.1.99  RECENT_CH6_MSB Register (Address = 0xAD) [reset = 0x0]
      100. 8.1.100 RECENT_CH7_LSB Register (Address = 0xAE) [reset = 0x0]
      101. 8.1.101 RECENT_CH7_MSB Register (Address = 0xAF) [reset = 0x0]
      102. 8.1.102 GPO0_TRIG_EVENT_SEL Register (Address = 0xC3) [reset = 0x0]
      103. 8.1.103 GPO1_TRIG_EVENT_SEL Register (Address = 0xC5) [reset = 0x0]
      104. 8.1.104 GPO2_TRIG_EVENT_SEL Register (Address = 0xC7) [reset = 0x0]
      105. 8.1.105 GPO3_TRIG_EVENT_SEL Register (Address = 0xC9) [reset = 0x0]
      106. 8.1.106 GPO4_TRIG_EVENT_SEL Register (Address = 0xCB) [reset = 0x0]
      107. 8.1.107 GPO5_TRIG_EVENT_SEL Register (Address = 0xCD) [reset = 0x0]
      108. 8.1.108 GPO6_TRIG_EVENT_SEL Register (Address = 0xCF) [reset = 0x0]
      109. 8.1.109 GPO7_TRIG_EVENT_SEL Register (Address = 0xD1) [reset = 0x0]
      110. 8.1.110 GPO_TRIGGER_CFG Register (Address = 0xE9) [reset = 0x0]
      111. 8.1.111 GPO_VALUE_TRIG Register (Address = 0xEB) [reset = 0x0]
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Mixed-Channel Configuration
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Digital Input
          2. 9.2.1.2.2 Digital Open-Drain Output
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Digital Push-Pull Output Configuration
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 AVDD and DVDD Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 接收文档更新通知
    2. 10.2 支持资源
    3. 10.3 Trademarks
    4. 10.4 静电放电警告
    5. 10.5 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.1 ADS7038 Registers

Table 8-1 lists the ADS7038 registers. All register offset addresses not listed in Table 8-1 should be considered as reserved locations and the register contents should not be modified.

Table 8-1 ADS7038 Registers
Address Acronym Register Name Section
0x0 SYSTEM_STATUS SYSTEM_STATUS Register (Address = 0x0) [reset = 0x81]
0x1 GENERAL_CFG GENERAL_CFG Register (Address = 0x1) [reset = 0x0]
0x2 DATA_CFG DATA_CFG Register (Address = 0x2) [reset = 0x0]
0x3 OSR_CFG OSR_CFG Register (Address = 0x3) [reset = 0x0]
0x4 OPMODE_CFG OPMODE_CFG Register (Address = 0x4) [reset = 0x0]
0x5 PIN_CFG PIN_CFG Register (Address = 0x5) [reset = 0x0]
0x7 GPIO_CFG GPIO_CFG Register (Address = 0x7) [reset = 0x0]
0x9 GPO_DRIVE_CFG GPO_DRIVE_CFG Register (Address = 0x9) [reset = 0x0]
0xB GPO_VALUE GPO_VALUE Register (Address = 0xB) [reset = 0x0]
0xD GPI_VALUE GPI_VALUE Register (Address = 0xD) [reset = 0x0]
0x10 SEQUENCE_CFG SEQUENCE_CFG Register (Address = 0x10) [reset = 0x0]
0x11 CHANNEL_SEL CHANNEL_SEL Register (Address = 0x11) [reset = 0x0]
0x12 AUTO_SEQ_CH_SEL AUTO_SEQ_CH_SEL Register (Address = 0x12) [reset = 0x0]
0x14 ALERT_CH_SEL ALERT_CH_SEL Register (Address = 0x14) [reset = 0x0]
0x16 ALERT_MAP ALERT_MAP Register (Address = 0x16) [reset = 0x0]
0x17 ALERT_PIN_CFG ALERT_PIN_CFG Register (Address = 0x17) [reset = 0x0]
0x18 EVENT_FLAG EVENT_FLAG Register (Address = 0x18) [reset = 0x0]
0x1A EVENT_HIGH_FLAG EVENT_HIGH_FLAG Register (Address = 0x1A) [reset = 0x0]
0x1C EVENT_LOW_FLAG EVENT_LOW_FLAG Register (Address = 0x1C) [reset = 0x0]
0x1E EVENT_RGN EVENT_RGN Register (Address = 0x1E) [reset = 0x0]
0x20 HYSTERESIS_CH0 HYSTERESIS_CH0 Register (Address = 0x20) [reset = 0xF0]
0x21 HIGH_TH_CH0 HIGH_TH_CH0 Register (Address = 0x21) [reset = 0xFF]
0x22 EVENT_COUNT_CH0 EVENT_COUNT_CH0 Register (Address = 0x22) [reset = 0x0]
0x23 LOW_TH_CH0 LOW_TH_CH0 Register (Address = 0x23) [reset = 0x0]
0x24 HYSTERESIS_CH1 HYSTERESIS_CH1 Register (Address = 0x24) [reset = 0xF0]
0x25 HIGH_TH_CH1 HIGH_TH_CH1 Register (Address = 0x25) [reset = 0xFF]
0x26 EVENT_COUNT_CH1 EVENT_COUNT_CH1 Register (Address = 0x26) [reset = 0x0]
0x27 LOW_TH_CH1 LOW_TH_CH1 Register (Address = 0x27) [reset = 0x0]
0x28 HYSTERESIS_CH2 HYSTERESIS_CH2 Register (Address = 0x28) [reset = 0xF0]
0x29 HIGH_TH_CH2 HIGH_TH_CH2 Register (Address = 0x29) [reset = 0xFF]
0x2A EVENT_COUNT_CH2 EVENT_COUNT_CH2 Register (Address = 0x2A) [reset = 0x0]
0x2B LOW_TH_CH2 LOW_TH_CH2 Register (Address = 0x2B) [reset = 0x0]
0x2C HYSTERESIS_CH3 HYSTERESIS_CH3 Register (Address = 0x2C) [reset = 0xF0]
0x2D HIGH_TH_CH3 HIGH_TH_CH3 Register (Address = 0x2D) [reset = 0xFF]
0x2E EVENT_COUNT_CH3 EVENT_COUNT_CH3 Register (Address = 0x2E) [reset = 0x0]
0x2F LOW_TH_CH3 LOW_TH_CH3 Register (Address = 0x2F) [reset = 0x0]
0x30 HYSTERESIS_CH4 HYSTERESIS_CH4 Register (Address = 0x30) [reset = 0xF0]
0x31 HIGH_TH_CH4 HIGH_TH_CH4 Register (Address = 0x31) [reset = 0xFF]
0x32 EVENT_COUNT_CH4 EVENT_COUNT_CH4 Register (Address = 0x32) [reset = 0x0]
0x33 LOW_TH_CH4 LOW_TH_CH4 Register (Address = 0x33) [reset = 0x0]
0x34 HYSTERESIS_CH5 HYSTERESIS_CH5 Register (Address = 0x34) [reset = 0xF0]
0x35 HIGH_TH_CH5 HIGH_TH_CH5 Register (Address = 0x35) [reset = 0xFF]
0x36 EVENT_COUNT_CH5 EVENT_COUNT_CH5 Register (Address = 0x36) [reset = 0x0]
0x37 LOW_TH_CH5 LOW_TH_CH5 Register (Address = 0x37) [reset = 0x0]
0x38 HYSTERESIS_CH6 HYSTERESIS_CH6 Register (Address = 0x38) [reset = 0xF0]
0x39 HIGH_TH_CH6 HIGH_TH_CH6 Register (Address = 0x39) [reset = 0xFF]
0x3A EVENT_COUNT_CH6 EVENT_COUNT_CH6 Register (Address = 0x3A) [reset = 0x0]
0x3B LOW_TH_CH6 LOW_TH_CH6 Register (Address = 0x3B) [reset = 0x0]
0x3C HYSTERESIS_CH7 HYSTERESIS_CH7 Register (Address = 0x3C) [reset = 0xF0]
0x3D HIGH_TH_CH7 HIGH_TH_CH7 Register (Address = 0x3D) [reset = 0xFF]
0x3E EVENT_COUNT_CH7 EVENT_COUNT_CH7 Register (Address = 0x3E) [reset = 0x0]
0x3F LOW_TH_CH7 LOW_TH_CH7 Register (Address = 0x3F) [reset = 0x0]
0x4E RESERVED RESERVED Register (Address = 0x4E) [reset = 0x0]
0x60 MAX_CH0_LSB MAX_CH0_LSB Register (Address = 0x60) [reset = 0x0]
0x61 MAX_CH0_MSB MAX_CH0_MSB Register (Address = 0x61) [reset = 0x0]
0x62 MAX_CH1_LSB MAX_CH1_LSB Register (Address = 0x62) [reset = 0x0]
0x63 MAX_CH1_MSB MAX_CH1_MSB Register (Address = 0x63) [reset = 0x0]
0x64 MAX_CH2_LSB MAX_CH2_LSB Register (Address = 0x64) [reset = 0x0]
0x65 MAX_CH2_MSB MAX_CH2_MSB Register (Address = 0x65) [reset = 0x0]
0x66 MAX_CH3_LSB MAX_CH3_LSB Register (Address = 0x66) [reset = 0x0]
0x67 MAX_CH3_MSB MAX_CH3_MSB Register (Address = 0x67) [reset = 0x0]
0x68 MAX_CH4_LSB MAX_CH4_LSB Register (Address = 0x68) [reset = 0x0]
0x69 MAX_CH4_MSB MAX_CH4_MSB Register (Address = 0x69) [reset = 0x0]
0x6A MAX_CH5_LSB MAX_CH5_LSB Register (Address = 0x6A) [reset = 0x0]
0x6B MAX_CH5_MSB MAX_CH5_MSB Register (Address = 0x6B) [reset = 0x0]
0x6C MAX_CH6_LSB MAX_CH6_LSB Register (Address = 0x6C) [reset = 0x0]
0x6D MAX_CH6_MSB MAX_CH6_MSB Register (Address = 0x6D) [reset = 0x0]
0x6E MAX_CH7_LSB MAX_CH7_LSB Register (Address = 0x6E) [reset = 0x0]
0x6F MAX_CH7_MSB MAX_CH7_MSB Register (Address = 0x6F) [reset = 0x0]
0x80 MIN_CH0_LSB MIN_CH0_LSB Register (Address = 0x80) [reset = 0xFF]
0x81 MIN_CH0_MSB MIN_CH0_MSB Register (Address = 0x81) [reset = 0xFF]
0x82 MIN_CH1_LSB MIN_CH1_LSB Register (Address = 0x82) [reset = 0xFF]
0x83 MIN_CH1_MSB MIN_CH1_MSB Register (Address = 0x83) [reset = 0xFF]
0x84 MIN_CH2_LSB MIN_CH2_LSB Register (Address = 0x84) [reset = 0xFF]
0x85 MIN_CH2_MSB MIN_CH2_MSB Register (Address = 0x85) [reset = 0xFF]
0x86 MIN_CH3_LSB MIN_CH3_LSB Register (Address = 0x86) [reset = 0xFF]
0x87 MIN_CH3_MSB MIN_CH3_MSB Register (Address = 0x87) [reset = 0xFF]
0x88 MIN_CH4_LSB MIN_CH4_LSB Register (Address = 0x88) [reset = 0xFF]
0x89 MIN_CH4_MSB MIN_CH4_MSB Register (Address = 0x89) [reset = 0xFF]
0x8A MIN_CH5_LSB MIN_CH5_LSB Register (Address = 0x8A) [reset = 0xFF]
0x8B MIN_CH5_MSB MIN_CH5_MSB Register (Address = 0x8B) [reset = 0xFF]
0x8C MIN_CH6_LSB MIN_CH6_LSB Register (Address = 0x8C) [reset = 0xFF]
0x8D MIN_CH6_MSB MIN_CH6_MSB Register (Address = 0x8D) [reset = 0xFF]
0x8E MIN_CH7_LSB MIN_CH7_LSB Register (Address = 0x8E) [reset = 0xFF]
0x8F MIN_CH7_MSB MIN_CH7_MSB Register (Address = 0x8F) [reset = 0xFF]
0xA0 RECENT_CH0_LSB RECENT_CH0_LSB Register (Address = 0xA0) [reset = 0x0]
0xA1 RECENT_CH0_MSB RECENT_CH0_MSB Register (Address = 0xA1) [reset = 0x0]
0xA2 RECENT_CH1_LSB RECENT_CH1_LSB Register (Address = 0xA2) [reset = 0x0]
0xA3 RECENT_CH1_MSB RECENT_CH1_MSB Register (Address = 0xA3) [reset = 0x0]
0xA4 RECENT_CH2_LSB RECENT_CH2_LSB Register (Address = 0xA4) [reset = 0x0]
0xA5 RECENT_CH2_MSB RECENT_CH2_MSB Register (Address = 0xA5) [reset = 0x0]
0xA6 RECENT_CH3_LSB RECENT_CH3_LSB Register (Address = 0xA6) [reset = 0x0]
0xA7 RECENT_CH3_MSB RECENT_CH3_MSB Register (Address = 0xA7) [reset = 0x0]
0xA8 RECENT_CH4_LSB RECENT_CH4_LSB Register (Address = 0xA8) [reset = 0x0]
0xA9 RECENT_CH4_MSB RECENT_CH4_MSB Register (Address = 0xA9) [reset = 0x0]
0xAA RECENT_CH5_LSB RECENT_CH5_LSB Register (Address = 0xAA) [reset = 0x0]
0xAB RECENT_CH5_MSB RECENT_CH5_MSB Register (Address = 0xAB) [reset = 0x0]
0xAC RECENT_CH6_LSB RECENT_CH6_LSB Register (Address = 0xAC) [reset = 0x0]
0xAD RECENT_CH6_MSB RECENT_CH6_MSB Register (Address = 0xAD) [reset = 0x0]
0xAE RECENT_CH7_LSB RECENT_CH7_LSB Register (Address = 0xAE) [reset = 0x0]
0xAF RECENT_CH7_MSB RECENT_CH7_MSB Register (Address = 0xAF) [reset = 0x0]
0xC3 GPO0_TRIG_EVENT_SEL GPO0_TRIG_EVENT_SEL Register (Address = 0xC3) [reset = 0x0]
0xC5 GPO1_TRIG_EVENT_SEL GPO1_TRIG_EVENT_SEL Register (Address = 0xC5) [reset = 0x0]
0xC7 GPO2_TRIG_EVENT_SEL GPO2_TRIG_EVENT_SEL Register (Address = 0xC7) [reset = 0x0]
0xC9 GPO3_TRIG_EVENT_SEL GPO3_TRIG_EVENT_SEL Register (Address = 0xC9) [reset = 0x0]
0xCB GPO4_TRIG_EVENT_SEL GPO4_TRIG_EVENT_SEL Register (Address = 0xCB) [reset = 0x0]
0xCD GPO5_TRIG_EVENT_SEL GPO5_TRIG_EVENT_SEL Register (Address = 0xCD) [reset = 0x0]
0xCF GPO6_TRIG_EVENT_SEL GPO6_TRIG_EVENT_SEL Register (Address = 0xCF) [reset = 0x0]
0xD1 GPO7_TRIG_EVENT_SEL GPO7_TRIG_EVENT_SEL Register (Address = 0xD1) [reset = 0x0]
0xE9 GPO_TRIGGER_CFG GPO_TRIGGER_CFG Register (Address = 0xE9) [reset = 0x0]
0xEB GPO_VALUE_TRIG GPO_VALUE_TRIG Register (Address = 0xEB) [reset = 0x0]

Complex bit access types are encoded to fit into small table cells. Table 8-2 shows the codes that are used for access types in this section.

Table 8-2 ADS7038 Access Type Codes
Access Type Code Description
Read Type
R R Read
Write Type
W W Write
Reset or Default Value
-n Value after reset or the default value
Register Array Variables
i,j,k,l,m,n When these variables are used in a register name, an offset, or an address, they refer to the value of a register array where the register is part of a group of repeating registers. The register groups form a hierarchical structure and the array is represented with a formula.
y When this variable is used in a register name, an offset, or an address it refers to the value of a register array.