SPRUJ51A June   2023  – November 2025

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Device Information
    4. 1.4 EVM Revisions and Assembly Variants
    5. 1.5 Specification
  6. 2Hardware
    1. 2.1  Additional Images
    2. 2.2  Key Features
      1. 2.2.1 Processor
      2. 2.2.2 Memory
      3. 2.2.3 JTAG Emulator
      4. 2.2.4 Supported Interfaces and Peripherals
      5. 2.2.5 Expansion Connectors Headers to Support Application Specific Add On Boards
    3. 2.3  Power
      1. 2.3.1 Power Requirements
      2. 2.3.2 Power Input
      3. 2.3.3 Power Supply
      4. 2.3.4 Power ON OFF Procedures
        1. 2.3.4.1 Power-On Procedure
        2. 2.3.4.2 Power-Off Procedure
        3. 2.3.4.3 Power Test Points
      5. 2.3.5 Power Sequencing
      6. 2.3.6 AM62x 17x17 SoC Power
      7. 2.3.7 Current Monitoring
    4. 2.4  AM62x-Low Power SK EVM Interface Mapping
    5. 2.5  Clocking
    6. 2.6  Reset
    7. 2.7  OLDI Display Interface
    8. 2.8  CSI Interface
    9. 2.9  Audio Codec Interface
    10. 2.10 HDMI Display Interface
    11. 2.11 JTAG Interface
    12. 2.12 Test Automation Header
    13. 2.13 UART Interface
    14. 2.14 USB Interface
      1. 2.14.1 USB2.0 Type A Interface
      2. 2.14.2 USB2.0 Type C Interface
    15. 2.15 Memory Interfaces
      1. 2.15.1 LPDDR4 Interface
      2. 2.15.2 OSPI
      3. 2.15.3 MMC Interfaces
        1. 2.15.3.1 MMC0 - eMMC Interface
        2. 2.15.3.2 MMC1 - Micro SD Interface
        3. 2.15.3.3 MMC2 - M2 Key E Interface
      4. 2.15.4 EEPROM
    16. 2.16 Ethernet Interface
      1. 2.16.1 CPSW Ethernet PHY1 Default Configuration
      2. 2.16.2 CPSW Ethernet PHY2 Default Configuration
    17. 2.17 GPIO Port Expander
    18. 2.18 GPIO Mapping
    19. 2.19 AM62x-Low Power SK EVM User Setup and Configuration
      1. 2.19.1 EVM DIP Switches
      2. 2.19.2 Boot Modes
      3. 2.19.3 User Test LEDs
    20. 2.20 Expansion Headers
      1. 2.20.1 User Expansion Connector
      2. 2.20.2 MCU Connector
      3. 2.20.3 PRU Connector
    21. 2.21 Push Buttons
    22. 2.22 I2C Address Mapping
  7. 3Hardware Design Files
  8. 4Compliance Information
    1. 4.1 EMC, EMI and ESD Compliance
  9. 5Additional Information
    1. 5.1 Known Issues and Modifications
    2.     Trademarks
    3.     72
  10. 6Revision History

2.4 AM62x-Low Power SK EVM Interface Mapping

Table 2-6 Interface Mapping
Interface Name Port on SoC DevicePart Number
Memory – LPDDR4DDR0MT53E1G16D1FW-046 WT:A
Memory –OSPIOSPI0W35N01JWTBAG
Memory –Micro SD SocketMMC1MEM2051-00-195-00-A
Memory –eMMCMMC0MTFC16GAPALBH-IT
Memory –Board ID EEPROMSoC_I2C0M24512-DFMC6TG
Ethernet 1– RGMIISoC_RGMII1DP83867IRRGZ
Ethernet 2– RGMIISoC_RGMII2DP83867IRRGZ
GPIO Port Expander1SoC_I2C1TCA6424ARGJR
PRU Header – 2x10 HDRPR0_PRU0_GPOand SoC_I2C0PREC010DAAN-RC
User Expansion Connector – 2x20 HDR

SPI0, SPI2, UART5, SoC_I2C0, SoC_I2C2

andGPIOs

PEC20DAAN
MCU Header – 2x14 HDRMCU MCU_UART0, MCU_MCAN0, MCU_SPI0, MCU_I2C0 and MCU GPIOsPREC014DAAN-RC
USB2.0 Type CUSB02012670005
USB2.0 Type AUSB1629104151021
LVDS Display ConnectorOLDI0FFC2A32-40-T
CSI InterfaceCSI0QSH-020-01-L-D-DP-A-K
HDMIVOUT0SiI9022ACNU+ TPD12S016PWR + 10029449-001RLF
Audio CodecMcASP1 and SoC_I2C1TLV320AIC3106IRGZT+ SJ-43514-SM
GPIO Port Expander 2SoC_I2C1TCA6424ARGJR
UART Terminal (UART-to-USB)SoC_UART SoC_UART[1:0], WKUP_UART0 and MCU_UART0FT4232HL + 629105150521
Test Automation HeaderSoC_I2C1FH12A-40S-0.5SH
Temperature SensorsSoC_I2C1TMP100NA/3K
Current MonitorsSoC_I2C1INA231AIYFDR
Connectivity– M.2 Key EMMC2, McASP1 and SoC_UART12199119-4