SPRUIU8B August   2020  – March 2026 TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1

 

  1.   1
  2.   Live Firmware Update With Device Reset on C2000 MCUs
  3.   Trademarks
  4. 1Introduction
  5. 2Resources Required for LFU
  6. 3Memory Layout
  7. 4Static Code in LFU
  8. 5LED Example Application and LFU Flow
  9. 6Running the LED Example
    1. 6.1 Serial Flash Programmer Update
    2. 6.2 Programming Static Code – Loading via Code Composer Studio (CCS)
    3. 6.3 Live Firmware Update of Application
    4. 6.4 Limitations and Troubleshooting
  10. 7Extended Implementations
    1. 7.1 Live Firmware Update with Reset on F28P65x MCUs
      1. 7.1.1 F28P65x LFU Hardware Requirements
      2. 7.1.2 Flash Organization
      3. 7.1.3 FWU Boot Mode
      4. 7.1.4 LED Example Application
        1. 7.1.4.1 LFU Command Processing
      5. 7.1.5 Running the Example
        1. 7.1.5.1 Loading the Example
        2. 7.1.5.2 Combing CPU1 and CPU2 Firmware Images
        3. 7.1.5.3 LFU over MCAN Host Programmer
          1. 7.1.5.3.1 Compiling the Host Programmer
          2. 7.1.5.3.2 Using the Host Programmer
      6. 7.1.6 Restrictions
  11. 8Revision History

7.1.4.1 LFU Command Processing

When a new command is sent to the device from the host utility, CPU2 receives and parses the command to determine the LFU mode. The LFU commands available are the following:

CPU2 LFU Command

If the command matches the CPU2 LFU (COMMAND_LFU_CPU2) command, then the code branches to the CPU2 LFU function (LFUCPU2Flow() in sbl_command_flow.c) in the active CPU2 flash bank. Within this function, execution passes to the downloadBlock() function after erasing the inactive CPU2 flash bank. The firmware (in the appropriate hex format) is programmed and verified in the inactive flash bank. Then, CPU2 configures a Watchdog reset for CPU2. After the CPU2 resets, CPU1 handles the CPU2.NMIWDRSn NMI and boots CPU2 in FWU mode to execute the active firmware.

CPU1 LFU Command

If the command matches the CPU1 LFU (COMMAND_LFU_CPU1) command, then the code branches to the CPU1 LFU function (LFUCPU1Flow() in sbl_command_flow.c) in the active CPU2 flash bank. Within this function, execution passes to the downloadBlock() function after erasing the inactive CPU1 flash bank. The firmware (in the appropriate hex format) is programmed and verified in the inactive CPU1 flash bank. Then, CPU2 issues an IPC command to configure a CPU1 Watchdog reset. Note that CPU2 also resets with a CPU1 Watchdog reset. Thus, after CPU1 boots in FWU mode to the active CPU1 flash bank, the CPU1 application must boot CPU2 in FWU mode to execute the active firmware.

CPU1 + CPU2 LFU Command

If the command matches the CPU1 + CPU2 LFU (COMMAND_LFU_CPU1_CPU2) command, then the code branches to the CPU1 + CPU2 LFU function (LFUCPU1CPU2Flow() in sbl_command_flow.c) in the active CPU2 flash bank. Within this function, execution passes to the downloadBlock() function (called twice to program CPU1 and CPU2 flash) after erasing the inactive CPU1 and CPU2 flash banks. The firmware (in the appropriate hex format) is programmed and verified in the inactive CPU1 and CPU2 flash banks. Then, CPU2 issues an IPC command to configure a CPU1 Watchdog reset. Note that CPU2 also resets with a CPU1 Watchdog reset. Thus, after CPU1 boots in FWU mode to the active CPU1 flash bank, the CPU1 application must boot CPU2 in FWU mode to execute the active firmware.