1 Introduction

Present day processing unit (CPU) used in real time MCUs implement a host of different functions in hardware to reduce the latency and improve the performance. Among these, division and modulo (remainder) are two complex functions to implement. To make matters hard, there are multiple definitions for division and modulo function according to the programming language and computer science literature. These different definitions provide different mathematical properties that can be beneficially employed in the application context. C28x CPU has added new instructions to enable applications to implement different division and modulo functions efficiently. By doing so, C28x CPU became the first CPU used in the MCU application space to implement these operations in hardware.

Low latency, ability to interrupt and higher efficiency are some of the important considerations when designing the instruction set architecture for the CPU of a real time MCU. The inputs from the real world which are used for processing can be of different types (unsigned, signed) and different sizes (16, 32, 64, 128, and so forth). The instruction set architecture should enable seamless processing of different combination of these values also. The new instructions used to enable integer division are interruptible, have very low latency and support different types of operations (ui32/ui32, i32/ui32, i64/i32, ui64/ui32, ui64/ui64, i64/i64, and so forth).