SPMU378 April   2026 TPS26750A

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Notational Conventions
    3.     Glossary
    4.     Related Documents
    5.     Support Resources
    6.     Trademarks
  3. 1Introduction
    1. 1.1 Introduction
      1. 1.1.1 Purpose and Scope
    2. 1.2 PD Controller Host Interface Description
      1. 1.2.1 Overview
      2. 1.2.2 Register and field notation
    3. 1.3 Unique Address Interface
      1. 1.3.1 Unique Address Interface Protocol
  4. 2PD Controller Policy Modes
    1. 2.1 Overview
    2. 2.2 Source Policy Mode
    3. 2.3 Sink Policy Mode
  5. 3Register Overview
    1. 3.1 TPS26750A Registers
  6. 44CC Task Detailed Descriptions
    1. 4.1 Overview
    2. 4.2 CPU Control Tasks
      1. 4.2.1 'Gaid' - Return to normal operation
      2. 4.2.2 'GAID' - Cold reset request
    3. 4.3 PD Message Tasks
      1. 4.3.1  'SWSk' - PD PR_Swap to Sink
      2. 4.3.2  'SWSr' - PD PR_Swap to Source
      3. 4.3.3  'SWDF' - PD DR_Swap to DFP
      4. 4.3.4  'SWUF' - PD DR_Swap to UFP
      5. 4.3.5  'GSkC' - PD Get Sink Capabilities
      6. 4.3.6  'GSrC' - PD Get Source Capabilities
      7. 4.3.7  'ESkC' - PD EPR Get Sink Capabilities
      8. 4.3.8  'ESrC' - PD EPR Get Source Capabilities
      9. 4.3.9  'SSrC' - PD Send Source Capabilities
      10. 4.3.10 'GPPI' - PD Get Port Partner Information
      11. 4.3.11 'MBRd' - Message Buffer Read
    4. 4.4 Patch Bundle Update Tasks
      1. 4.4.1  'PBMs' - Start Patch Burst Mode Download Sequence
      2. 4.4.2  'PBMc' - Patch Burst Mode Download Complete
      3. 4.4.3  'PBMe' - End Patch Burst Mode Download Sequence
      4. 4.4.4  'GO2P' - Go to Patch Mode
      5. 4.4.5  'PTCs' - Start Patch Download Sequence
      6. 4.4.6  'PTCd' - Patch Download
      7. 4.4.7  'PTCc' - Patch Download Complete
      8. 4.4.8  'PTCq' - Patch Query
      9. 4.4.9  'PTCr' - Patch Reset
      10. 4.4.10 'FLrd' - Flash Memory Read
      11. 4.4.11 'FLad' - Flash Memory Write Start Address
      12. 4.4.12 'FLwd' - Flash Memory Write
      13. 4.4.13 'FLvy' - Flash Memory Verify
    5. 4.5 System Tasks
      1. 4.5.1 'ANeg' - Auto Negotiate Sink Update
      2. 4.5.2 'DBfg' - Clear Dead Battery Flag
      3. 4.5.3 'I2Cr' - I2C read transaction
      4. 4.5.4 'I2Cw' - I2C write transaction
      5. 4.5.5 'GPsh' - set GPIO high
      6. 4.5.6 'GPsl' - set GPIO low
  7. 5User Reference
    1. 5.1 PD Controller Application Customization
    2. 5.2 Loading a Patch Bundle
    3. 5.3 AUTO_NEGOTIATE_SINK Register
      1. 5.3.1 AUTO_NEGOTIATE_SINK Usage Example 1
      2. 5.3.2 AUTO_NEGOTIATE_SINK Usage Example 2
      3. 5.3.3 AUTO_NEGOTIATE_SINK Usage Example 3
      4. 5.3.4 AUTO_NEGOTIATE_SINK Usage Example 4
    4. 5.4 Liquid Detection Registers
    5. 5.5 GPIO Events
  8. 6Revision History

'PTCq' - Patch Query

Table 4-22 'PTCq' - Patch Query
DescriptionThe 'PTCq' Task can be used to query the status of the patchprocess.
INPUT DATAXNone
OUTPUT DATAXBitNameDescription
111:104ApplicationConfigurationPatchSource
0x00None
0x01Application Configuration Patch Loaded from SRAM
0x02Application Configuration Patch Loaded from EEPROM
0x03Application Configuration Patch Loaded from I2C
0x04Application Configuration Patch Loaded from Default Configuration
103:96ApplicationConfigurationPatchState
0x00No Application Configuration Patch
0x01Application Configuration Patch Loading from SRAM
0x02Application Configuration Patch Loading from EEPROM
0x03Application Configuration Patch Loading from I2C
0x04Application Configuration Patch Loading from Default Configuration
0x05Application Configuration Patch Loading Done
0x06Application Configuration Patch Loading First
0x07Application Configuration Patch Loading Last
0x08Application Configuration Patch Error
0x09Application Configuration Patch Completed Successfully
0x0AApplication Configuration Patch Loading Failed
95:88DevicePatchSource
0x00None
0x01Device Patch Loaded from SRAM
0x02Device Patch Loaded from EEPROM
0x03Device Patch Loaded from I2C
0x04Default
OUTPUT DATAXBitNameDescription
87:80DevicePatchState
0x00No Device Patch
0x01Device Patch Loading
0x02Device Patch Loading Done
0x03Device Patch Running
0x04Reserved
0x05Reserved
0x06Device Patch Error
79:64ApplicationConfigurationDataTransferredSizeofApplicationConfigurationsent
55:48DevicePatchDataTransferredSize of Device Patch sent
47:32TotalDataTransferredSizeoftotalpatchsent,includingApplicationConfigurationandtheDevicePatch
31:24ReservedReserved
23:16PatchLoadingState
0x00Not Started
0x01Application Configuration Header Phase 1
0x02Application Configuration Header Phase 2
0x03Waiting for Application Configuration Data
0x04Application Configuration Data Loading
0x05Waiting for Device Patch Data
0x06Device Patch Header Loading
0x07Device Patch Data Loading
0x08Device Patch Loading Done
0x09Error
0x0APatching Processes Completed Successfully
15:8PatchReturnCode
0x00Success
0x40Warning
0x80Failure
Byte 1: Status
7noDevicePatchIf set to 1, there is currently noDevicePatch
6:4ReservedReserved
3noApplicationConfigPatchIf set to 1, there is currently noApplicationConfigPatch
2:0ReservedReserved
Task CompletionThe 'PTCq' Task completes as output has valid information loaded.
Side EffectsNone
Additional InformationNone