SNVU768 December   2021 LM63460-Q1 , LM64460-Q1

 

  1.   Trademarks
  2. 1High-Density EVM Description
    1. 1.1 Typical Applications
    2. 1.2 Features and Electrical Performance
  3. 2EVM Performance Specifications
  4. 3EVM Photo
  5. 4Test Setup and Procedure
    1. 4.1 EVM Connections
    2. 4.2 EVM Setup
    3. 4.3 Test Equipment
    4. 4.4 Recommended Test Setup
      1. 4.4.1 Input Connections
      2. 4.4.2 Output Connections
    5. 4.5 Test Procedure
      1. 4.5.1 Line/Load Regulation and Efficiency
  6. 5Test Data and Performance Curves
    1. 5.1 Conversion Efficiency
    2. 5.2 Output Voltage Regulation
    3. 5.3 Operating Waveforms
      1. 5.3.1 Start-Up and Enable ON/OFF
      2. 5.3.2 Line and Load Transients
      3. 5.3.3 Short Circuit and Recovery
    4. 5.4 Thermal Performance
    5. 5.5 EMI Results – CISPR 25 Class 5
      1. 5.5.1 Conducted EMI
      2. 5.5.2 Radiated EMI
  7. 6EVM Documentation
    1. 6.1 Schematics
      1. 6.1.1 LM63460EVM-2MHZ Schematic
      2. 6.1.2 LM64460EVM-2MHZ Schematic
    2. 6.2 Bill of Materials
      1. 6.2.1 Alternative BOM Configurations
    3. 6.3 PCB Layout
    4. 6.4 Assembly Drawings
  8. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 Development Support
        1. 7.1.1.1 Custom Design With WEBENCH® Tools
    2. 7.2 Documentation Support
      1. 7.2.1 Related Documentation

4.1 EVM Connections

Referencing the EVM connections described in Table 4-1, use the recommended test setup in Figure 4-1 to evaluate the LM63460-Q1 and LM64460-Q1 converter. Working at an ESD-protected workstation, make sure that any wrist straps, bootstraps, or mats are connected and referencing the user to earth ground before power is applied to the EVM.

Figure 4-1 EVM Test Setup

Table 4-1 EVM Power Connections
LABELDESCRIPTION
VIN+Positive input power connection
VIN–Negative input power connection
VOUT+Positive output power connection
VOUT–Negative output power connection

Table 4-2 EVM Signal Connections
LABEL(1) DESCRIPTION
VIN+ (TP1) Positive input sense terminal. Connect the multimeter positive lead for measuring efficiency.
VIN– (TP2) Negative input sense terminal. Connect a multimeter negative lead for measuring efficiency.
VOUT+ (TP3) Positive output sense terminal. Connect a multimeter positive lead for measuring efficiency and line/load regulation.
VOUT– (TP4) Negative output sense terminal. Connect the multimeter negative lead for measuring efficiency and line/load regulation.
GND Ground reference point at J3
EN Precision enable input. Tie EN to GND to disable the regulator. Use a logic signal to control EN for remote ON/OFF functionality. Leave EN open for UVLO turn-on threshold set at 4.5 V.
SYNC Synchronization input (connects to the EN/SYNC or MODE/SYNC pins of the LM63460-Q1 and LM64460-Q1, respectively). Connect a valid clock signal to synchronize the switching frequency from 200 kHz to 2.2 MHz.
VCC VCC output
PGD Power-good monitor output. This is an open-drain flag with a 100-kΩ pullup resistor to VOUT.
INJ, VOUT Bode plot measurement and signal injection using a 50-Ω resistor from INJ to VOUT
BIAS External bias supply connection. A 1-Ω resistor from VOUT to BIAS simplifies bias current measurement.
(1) Refer to the LM63460-Q1 or LM64460-Q1 data sheets for absolute maximum ratings associated with the features in this table.