SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
Address FFFFFE04
15 | 10 | 8 | 7 | 4 | 1 | 0 |
ADDRESS[15:10] | MS | BLOCK_SIZE | RONLY | PRIV |
R/W-00 0000 | R/W-0 | R/W-0000 | R/W-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15-10 | ADDRESS[15:10] | R/W | 000000 | 6 Least Significant Bits of the Base Address. The Base Address sets the 22 most significant bits of the memory address. |
8 | MS | R/W | 0 | Memory Map Select 0 = Memory Map configuration not updated (Default) 1 = Enables the fine and coarse memory selects and activates the memory map |
7-4 | BLOCK_SIZE | R/W | 0000 | Configures the size of the memory 0000 = Memory select is disabled (Default) 0001 = 1KB 0010 = 2KB 0011 = 4KB 0100 = 8KB 0101 = 16KB 0110 = 32KB 0111 = 64KB 1000 = 128KB 1001 = 256KB 1010 = 512KB 1011 = 1MB 1100 = 2MB 1101 = 4MB 1110 = 8MB 1111 = 16MB |
1 | RONLY | R/W | 0 | Read-only protection. This bit sets read-only protection for the memory selected by the memory select. An illegal access exception is generated when a write is attempted to the memory. 0 = Read/write access to memory (Default) 1 = Read accesses to memory only |
0 | PRIV | R/W | 0 | Privilege mode protection. This bit sets privilege mode protection for the memory Registration selected by the memory select. An illegal access exception is generated on any access to memory protected by privilege mode. 0 = User/privilege mode accesses to memory (Default) 1 = Privilege mode accesses to memory only |