SNAU264 July   2021 CDCDB800

 

  1. Trademarks
  2. General Description
    1. 2.1 Features
  3. Quick Setup
    1. 3.1 Setup Procedure
  4. Signal Path and Control Switches
  5. Power Supplies
  6. Clock Inputs
    1. 6.1 Configuring Board for CDCDB803
  7. Clock Outputs
  8. Using SMBus
    1. 8.1 CDCDB803 SMBus Address
  9. Schematics
  10. 10Bill of Materials

Power Supplies

The power supply section on the EVM provides flexibility to power the device using the onboard regulator(s) or direct supply input(s). A combination of 0-Ω resistor options allows the user to modify the EVM power supply configuration, if desired.

By default, 3.3 V is supplied to VDD and VDDR input through the onboard LDO regulator, U6. To power the regulator, connect a 3.3-V to 5-V input voltage and ground from an external power source to the terminal block, J3.

To modify the EVM with a different power supply configuration, populate the resistor options as shown in Table 5-1. Then, apply the appropriate voltage(s) to the EVM power input(s).

If the EVM is configured for dual direct supplies, connect a 3.3-V supply to both VDD and VDDR supply and associated ground to the labeled terminal blocks.

Decoupling capacitors and 0-Ω resistor footprints, which can accommodate ferrite beads, can be used to isolate the EVM power input(s) from the device power pins.

Table 5-1 EVM Power Supply Configuration Options
TPS73533 LDO
Regulator (U6)
3.3 V (DEFAULT)
Dual
Direct Supplies
3.3 V
VDD port
(J3)
Apply 4 V to 6 V Apply 3.3 V ± 5%
VDDR port
(J4)
Not used Apply 3.3V ± 5%
U6 (3V3_INT) 3.3V (VDD & VDDR) Not used
R121

0

OPEN
JP6 SHUNT 2-3 SHUNT 1-2
JP7 SHUNT 2-3 SHUNT 1-2
C46 (decoupling cap) OPEN

22 uF