7 Using a common time-stamp signal through GPIO to time-align the RF integrated circuit

It is also possible to use general-purpose input/output (GPIO)-based control to enable sysref latch. In this mode, the sysref can operate in continuous sysref mode. All analog front-end devices will latch to the first reference clock rising edge after receiving a GPIO-based latch enable signal. All subsequent pulses will be ignored.

This approach only requires routing a CMOS GPIO signal to all of the analog front ends, which makes this method relatively simpler to implement compared to the single-shot sysref method, as it can be challenging to route a differential signal to multiple analog front-end devices on the board with matched lengths. At the same time, this approach requires synchronizing one GPIO per device from the host’s ASIC. The method is not suitable if the host ASIC or FPGA does not have enough GPIOs.

As shown in Figure 3, using GPIO-based control to enable sysref latch with the AFE8092, AFE8030, AFE8128 AFE8190, AFE8192 require a specific sequencing.