SLVU944B October   2015  – October 2020 TPS7H1101-SP

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Related Documentation
  3. 2Description
  4. 3Test Setup
    1. 3.1 Equipment
      1. 3.1.1 Power Supplies
      2. 3.1.2 Load Number 1
      3. 3.1.3 Meters
      4. 3.1.4 Oscilloscope
    2. 3.2 Bench Test Setup Conditions
      1. 3.2.1 Headers Description and Jumper Placement
      2. 3.2.2 Testing
    3. 3.3 Power-Up Procedure
      1. 3.3.1  IOUT and VOUT Measurements
      2. 3.3.2  Output Current Limiting
      3. 3.3.3  High-Side Current Sense
      4. 3.3.4  Current Foldback
      5. 3.3.5  Power Good
      6. 3.3.6  Dropout Voltage
      7. 3.3.7  Transient Response
      8. 3.3.8  Current Sharing
      9. 3.3.9  Soft-Start
      10. 3.3.10 Enable and Disable
      11. 3.3.11 Turn-Off
  5. 4Board Layout
    1. 4.1 EVM Layout Flexibility
  6. 5Schematic and Bill of Materials
  7.   Revision History

2 Description

The TPS7H1101SPEVM helps designers evaluate the operation and performance of the TPS7H1101A-SP ultra LDO regulator.

Table 2-1 Summary of Performance
Test Conditions Output Current Range
VIN = 1.5 V to 7 V Max 3 A

The evaluation module is designed to provide access to the features of the TPS7H1101A-SP. Some modifications can be made to this module to test performance with various input and output voltages and loads. Please reference TI E2ETM support forums for information and questions related to this EVM.