SLUUCF2C January 2021 – May 2022 BQ769142
The BQ769142 device integrates Overcurrent in Discharge 1 (OCD1) and Overcurrent in Discharge 2 (OCD2) Protections using a comparator that monitors the differential voltage across the SRN–SRP pins and triggers an OCD1 or OCD2 alert or fault when the voltage exceeds a programmable threshold VOCD1 or VOCD2. The VOCD1 and VOCD2 thresholds are independently programmable from 4 mV to 200 mV in 2-mV steps using the Protections:OCD1:Threshold and Protections:OCD2:Threshold configuration registers. The OCD1 and OCD2 protections are enabled using the Settings:Protection:Enabled Protections A:[OCD1] and Settings:Protection:Enabled Protections A:[OCD2] configuration bits.
The OCD1 and OCD2 circuitry triggers an alert signal when an overcurrent in discharge event is first detected, then will trigger a fault when this condition persists for a programmable detection delay, OCD1_DLY or OCD2_DLY, which can be independently set from 10 ms to 426 ms in units of 3.3 ms, with the actual delay being 3.3 ms × (2 + setting). The delay is set by the Protections:OCD1:Delay and Protections:OCD2:Delay configuration registers.
The device also integrates an Overcurrent in Discharge 3 (OCD3) Protection using the CC1 current measurement from the coulomb counter ADC, triggering an OCD3 alert or fault when the current is more negative (that is, an excessive discharge current) than a programmable threshold given by Protections:OCD3:Threshold. An alert signal is triggered when an overcurrent in discharge event is first detected, then a fault signal is triggered when this condition persists for a programmable detection delay, OCD3_DLY, which can be set from 0 sec to 255 sec in units of 1 sec. The delay is set by the Protections:OCD3:Delay configuration register. The OCD3 protection is enabled using the Settings:Protection:Enabled Protections C:[OCD3] configuration bit.
When an OCD1, OCD2, or OCD3 fault is triggered, the device will turn off the DSG FET if configured for autonomous FET control using Settings:Protection:DSG FET Protections A[OCD2][OCD1] or Settings:Protection:DSG FET Protections C[OCD3] configuration bits. The device will recover when a charging current is detected greater than or equal to Protections:OCD:Recovery Threshold for Protections:Recovery:Time duration.
The BQ769142 device also includes an Overcurrent in Discharge Latch (OCDL) protection, which can create a fault if multiple OCD1 or OCD2 or OCD3 failures occur within a programmable time window. Whenever an OCD1 or OCD2 or OCD3 fault is triggered, the OCDL latch counter is incremented. After the device recovers, it will decrement the OCDL counter after a programmable recovery time of Protections:OCDL:Counter Dec Delay if no further OCD1, OCD2, or OCD3 faults are detected. If the OCDL counter exceeds a programmable latch limit given by Protections:OCDL:Latch Limit, it will trigger an OCDL fault. An OCDL alert is generated whenever the OCDL counter is greater than zero.
The OCDL protection is enabled using the Settings:Protection:Enabled Protections C:[OCDL] configuration bit. If the OCDL protection fault is triggered, the device can recover if the load detect feature (see Section 6.2.18) is enabled and detects the load is removed, or if charging current is detected, or after a programmable time, or the host sends a 0x009B OCDL_RECOVER() subcommand. In order to recover based on charging current, the Settings:Protection:Protection Configuration[OCDL_CURR_RECOV] must be set, the device must be in series FET configuration, and the CHG FET must be enabled. The device will then recover from OCDL if a current is detected greater than or equal to Protections:OCDL:Recovery Threshold for Protections:OCDL:Recovery Time duration. If recovery is preferred based only on time, then the recovery based on charging current can be used, with the current threshold set to a small discharge current.
Further detail is described in the table below.
| Status | Condition | Action |
|---|---|---|
| Normal | VSRN–VSRP ≤ setting selected by
Protections:OCD1:Threshold VSRN–VSRP ≤ setting selected by Protections:OCD2:Threshold CC1 Current > Protections:OCD3:Threshold |
Safety Alert A()[OCD1] = 0 Safety Alert A()[OCD2] = 0 Safety Alert C()[OCD3] = 0 Decrement OCDL counter by one after each Protections:OCDL:Counter Dec Delay period if OCDL counter > 0 |
| Alert | VSRN–VSRP > setting selected by Protections:OCD1:Threshold | Safety Alert A()[OCD1] = 1 |
| Alert | VSRN–VSRP > setting selected by Protections:OCD2:Threshold | Safety Alert A()[OCD2] = 1 |
| Alert | CC1 Current ≤ Protections:OCD3:Threshold | Safety Alert C()[OCD3] = 1 |
| Trip | VSRN–VSRP > setting selected by Protections:OCD1:Threshold for Protections:OCD1:Delay duration | Safety Alert A()[OCD1] = 0 Safety Status A()[OCD1] = 1 Alarm Raw Status()[XDSG] = 1 if autonomous FET control is enabled; Increment OCDL counter |
| Trip | VSRN–VSRP > setting selected by Protections:OCD2:Threshold for Protections:OCD2:Delay duration | Safety Alert A()[OCD2] = 0 Safety Status A()[OCD2] = 1 Alarm Raw Status()[XDSG] = 1 if autonomous FET control is enabled; Increment OCDL counter |
| Trip | CC1 Current ≤ Protections:OCD3:Threshold for Protections:OCD3:Delay duration | Safety Alert C()[OCD3] = 0 Safety Status C()[OCD3] = 1 Alarm Raw Status()[XDSG] = 1 if autonomous FET control is enabled; Increment OCDL counter |
| Recovery | Safety Status A()[OCD1] = 1 or Safety Status A()[OCD2] = 1 or Safety Status C()[OCD3] = 1 and CC1 Current > Protections:OCD:Recovery Threshold for Protections:Recovery:Time duration | Safety Status A()[OCD1] = 0 Safety Status A()[OCD2] = 0 Safety Status C()[OCD3] = 0 Alarm Raw Status()[XDSG] = 0 |
| Latch Alert | OCDL counter > 0 | Safety Alert C()[OCDL] = 1 |
| Latch Trip | OCDL counter ≥ Protections:OCDL:Latch Limit | Safety Status C()[OCDL] = 1 Safety Alert C()[OCDL] = 0 Alarm Raw Status()[XDSG] = 1 if autonomous FET control is enabled; |
| Latch Reset (based on Load Detect) | Safety Status C()[OCDL] = 1 and load is detected removed using the Load Detect function | Safety Status C()[OCDL] = 0 Reset OCDL counter Alarm Raw Status()[XDSG] = 0 if Safety Status A()[OCD1] = 0 and Safety Status A()[OCD2] = 0 and Safety Status C()[OCD3] = 0 |
| Latch Reset (based on charging current) | Safety Status C()[OCDL] = 1 and CC1 Current > Protections:OCDL:Recovery Threshold | Safety Status C()[OCDL] = 0 Reset OCDL counter Alarm Raw Status()[XDSG] = 0 if Safety Status A()[OCD1] = 0 and Safety Status A()[OCD2] = 0 and Safety Status C()[OCD3] = 0 |
| Latch Reset (host-command) | Safety Status C()[OCDL] = 1 and host sends 0x009B OCDL_RECOVER() |
Safety Status C()[OCDL] = 0 Reset OCDL counter Alarm Raw Status()[XDSG] = 0 if Safety Status A()[OCD1] = 0 and Safety Status A()[OCD2] = 0 and Safety Status C()[OCD3] = 0 |