High-speed signals should be routed over a solid GND reference plane and not across a plane split or a void in the reference plane unless absolutely necessary. TI does not recommend high-speed signal references to power planes unless completely unavoidable.

Figure 3-4 Rerun Across Split Plane

Routing across a plane split or a void in the reference plane forces return high-frequency current to flow around the split or void. Figure 3-4 shows that the return path must take a longer route than the signal path this can result in the following conditions:

• Excess radiated emissions from an unbalanced current flow
• Delays in signal propagation delays due to increased series inductance
• • Interference with adjacent signals
  • Degraded signal integrity (that is, more jitter and reduced signal amplitude)
  If routing over a plane-split is completely unavoidable, place stitching capacitors across the split to provide a return path for the high-frequency current. These stitching capacitors minimize the current loop area and any impedance discontinuity created by crossing the split. These capacitors should be 1µF or lower and placed as close as possible to the plane crossing.

Figure 3-5 AC Capacitor Across Split Plane

When planning a PCB stackup, verify that planes that do not reference each other are not overlapped because this produces unwanted capacitance between the overlapping areas.

Avoid routing across different reference planes because this can cause impedance issues as well as EMI issues.

Do not change the reference plane of the high speed signal trace unless completely unavoidable. The red arrows are the signal path and the blue arrows are the return path.

Figure 3-6 Routing Across Different Reference Planes

If routing across different reference planes cannot be avoided use AC capacitors to allow the return current to have a pathway.

Figure 3-7 Routing Across Different Reference Planes with AC Capacitor

The entirety of any high-speed signal trace must maintain the same GND reference from origination to termination. If unable to maintain the same GND reference, via-stitch both GND planes together to maintain continuous grounding and uniform impedance. Place these stitching vias symmetrically within 200 mils (center-to-center, closer is better) of the signal transition vias.

Figure 3-8 Differential Pair Via Return Path Without GND Vias

Figure 3-9 Differential Pair Via Return Path With GND Vias

TI does not recommend high-speed signal references to power planes unless completely unavoidable. If unavoidable, use AC coupling capacitors and ground vias to allow the return signal to have a path back from the sink to the source. Figure 3-10 depicts the use of AC coupling capacitors and ground vias for the return path. The red arrows are the signal path and the blue arrows are the return path.

Figure 3-10 VCC Reference Plane