SLAU358Q September 2011 – October 2019
MSPGANG_ReadImageBlock reads the header from the selected image memory. A maximum of 254 bytes can be read. Access to the remaining image memory (up to 512KB) is blocked.
Syntax
LONG MSPGANG_ReadImageBlock(LONG addr, LONG size, void *lpData)
Arguments
| LONG address | |
| LONG size | |
| void *lpData | Pointer to byte buffer where the result is saved |
Result
| LONG | Error code |
union _IMAGE_HEADER
{
BYTE bytes[IMAGE_HEADER_SIZE];
WORD words[IMAGE_HEADER_SIZE/2];
struct
{
WORD own_PSA;
WORD global_PSA;
BYTE year;
BYTE month;
BYTE day;
BYTE hour;
BYTE min;
BYTE sec;
#define GLOBAL_PSA_START_OFFSET 10
// down - covered by global_PSA ----
#define SHORT_ID_2BYTE_OFFSET 10
WORD shortID;
#define CHUNKS_NO_2BYTE_OFFSET 12
WORD chunks;
#define IMAGE_DATA_2BYTE_OFFSET 14
WORD image_data_offset;
#define GLOBAL_SIZE_4BYTE_OFFSET 16
DWORD size; //global_size;
WORD ID_rev; //20
BYTE ID_name[HEADER_ID_SIZE]; //22
DWORD DLL_ver; //32
#define HEADER_COMMENT_ADDR 36
char comment[SCRIPT_TEXT_SIZE];
WORD used_tasks_mask; //52
BYTE Interface; //54 type (JTAG, SBW, BSL), speed(Fast, Med, Slow)
BYTE GangMask; //55
BYTE Vcc_PowerEn; //56
BYTE Icc_HiEn; //57
WORD Vcc_mV; //58
WORD min_Vcc_mV; //60
WORD max_Vcc_mV; //62
WORD RST_time_ms; //64
WORD RST_release_ms; //66
BYTE InfoA_Erase_En; //68
BYTE BSL_Erase_En_mask; //69
BYTE SecureDev_En; //70
BYTE DCO_Flags; //71
#define DCO_RETAIN_EN 0x01
#define DCO_VALIDATION_EN 0x02
#define DCO_RECAL_EN 0x04
#define DCO_ONE_CONSTANTS 0x08
BYTE IO_cfg; //72
#define SBW_VIA_RST_BIT 0x01
BYTE MemoryOption; //73 for GUI only - for displaying used memory option. No impact in firmware
BYTE InterfaceSpeed; //74 for GUI only - for displaying used speeds (JTAG/SBW/CJTAG/BSL). No impact in firmware
BYTE VccSettleTime; //75 settle time *20ms
BYTE JTAG_unlockEn : 1; //76
BYTE HasLockedInfoA : 1;
BYTE HasAutoEraseInBSL : 1;
BYTE BSL_X_type : 1;
BYTE spare_flag4 : 1;
BYTE spare_flag5 : 1;
BYTE spare_flag6 : 1;
BYTE spare_flag7 : 1;
BYTE ClrSegments; //77 MSP432
// #define MSP432_CLR_LOCKING_INFOA_BIT 0x01
// #define MSP432_CLR_LOCKING_BSL_BIT 0x02
BYTE BSL_1st_Passw; //78
//BYTE free[112-78];
}prg;
struct
{
BYTE offset[IMAGE_HEADER_CTRL_OFFSET]; //offset 112
BYTE flags; //0x70
#define IMAGE_LOCK 0x10 //must be the same bit as in LOCK_LD_PRJ
BYTE sp1; //0x71
BYTE sp2; //0x72
BYTE sp3; //0x73
BYTE sp4; //0x74
BYTE sp5; //0x75
BYTE sp6; //0x76
BYTE sp7; //0x77
BYTE sp8; //0x78
BYTE sp9; //0x79
BYTE sp10; //0x7A
BYTE sp11; //0x7B
BYTE sp12; //0x7C
BYTE sp13; //0x7D
BYTE sp14; //0x7E
BYTE sp15; //0x7F
}ctrl;
struct
{
BYTE offset[IMAGE_HEADER_SIZE/2];
char MCU_name[SCRIPT_MCU_NAME_SIZE]; //0
WORD Id[2]; //16
WORD SubId[2]; //20
WORD MainEraseMode; //24
WORD minPVcc; //26
WORD RAM_size; //28
WORD SubIDAddr; //30
BYTE FRAM; //32
//#define FRAM_NONE 0
//#define FRAM_ASIC 1
//#define FRAM_MSPXV2_57 2
//#define FRAM_APOLLO 3
//#define FRAM_MSPXV2_59 4
// --- one byte
BYTE DefaultDCO : 1; //33
BYTE ASIC : 1;
BYTE MPU : 1;
BYTE JTAG_Passw : 1;
BYTE BSLprogrammable : 1;
BYTE JTAG_Unlockable : 1;
BYTE BSL_16B_passw : 1;
BYTE F1_80 : 1; //spare
// --- one byte
BYTE TestPin; //34
BYTE CpuX; //35
BYTE Quick_W :1; //36
BYTE Quick_R :1;
BYTE Quick_W_bug :1;
BYTE Quick_0x08 :1;
BYTE Quick_0x10 :1;
BYTE Quick_0x20 :1;
BYTE Quick_0x40 :1;
BYTE Quick_0x80 :1;
BYTE FastFlash; //37
BYTE EnhVerify; //38
BYTE JTAG; //39
BYTE SpyBiWire; //40
BYTE Marginal; //41
BYTE F5xx; //42
BYTE MCU_Group; //43
WORD RAM_addr; //44
BYTE SYS_CLK; //46 used for F5xx and up
//#define STANDARD 0 - for compatibility
#define Xv2_PLL 1 //as standard before
#define HF_8MHz 2 //FRAM FR57xx
#define HF_1MHz 3 //Apollo
#define HF2_8MHz 4 //FRAM FR58xx, FR59xx
#define Xv2_PLL_G60XX 5
#define DCO_16384HZ 6 //i2xxx
BYTE InfoA_type; //47
//#define STANDARD 0 - for compatibility
#define I2XX_1K 1 //i2xxx 1K - 0x1000-0x13FF
BYTE FLASH_Type; //48
//#define STANDARD 0 - for compatibility
#define SEGMENT_1K 1 //i2xxx 1K flash segment size
#define FLASH_SEGM_2K 2
#define FLASH_SEGM_4K 4
#define FLASH_SEGM_8K 8
#define FLASH_SEGM_16K 16
#define FLASH_SEGM_32K 32
BYTE Secure_Type; //49
//#define STANDARD 0 - for compatibility
#define SUC 1 //i2xxx
BYTE Map; //50
BYTE SysClkDiv2; //51
BYTE NMI_to_addr; //52
#define NMI_TO_ADDR_NOT_SUPPORTED 0x80
BYTE FW_type; //53
#define FAMILY_XMS432P401 21 //XSP432P401 Rev-B obsolete - not supported
#define FAMILY_MSP432P401 22
#define FAMILY_MSP432P4111 23
#define FAMILY_MSP432 21
BYTE MCU_Type; //54
#define MSP430F 0x01 //or can be 0
#define CC_RF_BIT_ID 0x10
#define MSP_FR_BIT_ID 0x20
#define MSP432_BIT_ID 0x80
BYTE free_1; //55
BYTE free_2; //56
BYTE free_3; //57
WORD Id2[2]; //58
BYTE free_4; //62
// BYTE free[128-48];
}device;
};