SLAA517F May   2012  – August 2021 MSP430F6720A , MSP430F6720A , MSP430F6721A , MSP430F6721A , MSP430F6723A , MSP430F6723A , MSP430F6724A , MSP430F6724A , MSP430F6725A , MSP430F6725A , MSP430F6726A , MSP430F6726A , MSP430F6730A , MSP430F6730A , MSP430F6731A , MSP430F6731A , MSP430F6733A , MSP430F6733A , MSP430F6734A , MSP430F6734A , MSP430F6735A , MSP430F6735A , MSP430F6736 , MSP430F6736 , MSP430F6736A , MSP430F6736A

 

  1.   Trademarks
  2. 1Introduction
  3. 2System Diagrams
  4. 3Hardware Implementation
    1. 3.1 Power Supply
      1. 3.1.1 Resistor Capacitor (RC) Power Supply
    2. 3.2 Analog Inputs
      1. 3.2.1 Voltage Inputs
      2. 3.2.2 Current Inputs
  5. 4Software Implementation
    1. 4.1 Peripherals Setup
      1. 4.1.1 SD24 Setup
    2. 4.2 Foreground Process
      1. 4.2.1 Formulas
        1. 4.2.1.1 Voltage and Current
        2. 4.2.1.2 Power and Energy
    3. 4.3 Background Process
      1. 4.3.1 Voltage and Current Signals
      2. 4.3.2 Phase Compensation
      3. 4.3.3 Frequency Measurement and Cycle Tracking
      4. 4.3.4 LED Pulse Generation
  6. 5Energy Meter Demo
    1. 5.1 EVM Overview
      1. 5.1.1 Connections to the Test Setup for AC Voltages
      2. 5.1.2 Power Supply Options and Jumper Settings
    2. 5.2 Loading the Example Code
      1. 5.2.1 Opening the Project
  7. 6Results and Calibration
    1. 6.1 Viewing Results
    2. 6.2 Calibrating the Meter
      1. 6.2.1 Gain Correction
      2. 6.2.2 Phase Correction
      3. 6.2.3 Metrology Results
  8. 7References
  9. 8Schematics
  10. 9Revision History

4.1.1 SD24 Setup

The MSP430F673x(A) family has up to three independent sigma delta data converters. For a single phase system at least two ΣΔs are necessary to independently measure one voltage and current. The code accompanying this application report addresses the metrology for a 1-phase system with limited discussion to anti-tampering, however, the code supports the measurement of the neutral current. The clock to the SD24 (fM ) is derived from the DCO running at 16 MHz. The sampling frequency is defined as f s = f m O S R , the OSR is chosen to be 256 and the modulation frequency, fM, is chosen as 1 MHz (1 048 576 Hz), resulting in a sampling frequency of 4.096 ksps. The SD24s are configured to generate regular interrupts every sampling instant.

The following are the ΣΔ channels associations:

  • SD0P0 and SD0N0 → Voltage V1
  • SD1P0 and SD1N0 → Current I1
  • SD2P0 and SD2N0 → Current IN (Neutral)