SFFS422 May   2022

 

  1.   Trademarks
  2.   2
  3. 1Scope
  4. 2Related Documents
  5. 3Related Standards and Acronyms
  6. 4Concept Overview
    1. 4.1 System Block Diagram
    2. 4.2 System Specifications
    3. 4.3 Conditions of use: Assumptions
      1. 4.3.1 Generic Assumptions
      2. 4.3.2 Specific Assumptions
    4. 4.4 Safe Torque Off Implementation
      1. 4.4.1 Subsystem Elements
      2. 4.4.2 STO Safe Subsystem States and Timing Diagram
      3. 4.4.3 STO_1 Subsystem
      4. 4.4.4 STO_2 Subsystem
      5. 4.4.5 MCU (SIL 1) Diagnostic Coverage
      6. 4.4.6 STO_FB Subsystem
      7. 4.4.7 Information on ICs
        1. 4.4.7.1 Isolated 24-V Input Receiver
        2. 4.4.7.2 Load Switch: TPS22919
        3. 4.4.7.3 High-Side Switch: TPS27S100
        4. 4.4.7.4 Isolated Gate Driver: ISO5852S (ISO5452)
    5. 4.5 Safe State
  7. 5Concept FMEA
    1. 5.1 System FMEA
  8. 6References

4.4.2 STO Safe Subsystem States and Timing Diagram

Table 4-2 shows the logic table of the safety subsystem. STO_1 and STO_2 are active low signals. Logic levels valid for state changes > 1 ms.

Table 4-2 Safety Subsystem Logic Table
Input 1: STO_1 Input 2: STO_2 Output 1: VCC Output 2: P24V IGBT Gate Driver Output State
1 1 1 1 Normal operation Normal operation
1 0 1 0 0 (off) STO
0 1 0 1 0 (off) STO
0 0 0 0 0 (off) STO

The timing diagram of the STO_1 and STO_2 subsystems are shown in Figure 4-2 and Figure 4-3 respectively. The STO_1 and STO_2 safe subsystems cut the power of the primary and secondary supply of the gate drivers. Due to that, the output voltage OUTH/OUTL of each of the six gate drivers ISO5452 (or ISO5852S) become 0 V.

Figure 4-2 Timing Diagram Example ST0_1
Figure 4-3 Timing Diagram Example ST0_2
Figure 4-4 STO Timing Diagram Example for Turning Off the Six IGBTs, Which Results in Torque Off