SBAU353 October   2021

 

  1.   Trademarks
  2. 1EVM Overview
    1. 1.1 ADS131A04EVM Kit
    2. 1.2 ADS131A04EVM Board
  3. 2ADS131A04EVM Quick Start Guide
  4. 3EVM Analog Interface
    1. 3.1 ADC Analog Input Signal Path
    2. 3.2 ADC External Clock (XTAL1/CLKIN and XTAL2) Options
  5. 4Digital Interface
    1. 4.1 SPI Communication
    2. 4.2 Connection to the PHI
    3. 4.3 Digital Header
    4. 4.4 LaunchPad Connectors
  6. 5Power Supplies
  7. 6ADS131A04EVM Initial Setup
    1. 6.1 Default Jumper Settings
    2. 6.2 EVM Graphical User Interface (GUI) Software Installation
  8. 7ADS131A04EVM Software Reference
    1. 7.1 EVM GUI Global Settings for ADC Control
    2. 7.2 Register Map Configuration Tool
    3. 7.3 Time Domain Display Tool
    4. 7.4 Spectral Analysis Tool
    5. 7.5 Histogram Tool
  9. 8ADS131A04EVM Bill of Materials, PCB Layout, and Schematic
    1. 8.1 Bill of Materials
    2. 8.2 PCB Layout
    3. 8.3 Schematic
  10. 9References

3.1 ADC Analog Input Signal Path

Analog inputs to the EVM can be connected to either the terminal blocks associated with each ADC channel. The screw terminal blocks (J1, J2, J3, and J4) can interface directly with the leads of an external sensor input. There are SMA connectors on channel 4, J9 for AIN4N and J10 for AIN4P, in addition to the terminal blocks that can be utilized as well. Figure 3-1 shows the signal chain used for all four input channels on the EVM and is used to describe the supported input options in Figure 3-1 and Figure 3-2.

An input must not be applied such that the voltage on the input pins of the ADS131A04 exceeds the absolute maximum ratings. For more details, see the ADS131A04 4-Channel, Simultaneously-Sampling, 24-Bit, Delta-Sigma ADC Data Sheet.

R1, R2, and C14 form a differential low-pass filter with a –3-dB cutoff frequency of 169.3 kHz for channel 1. In addition R1 and C15 with R2 and C16 form a common mode low-pass filter with a –3-dB cutoff frequency of 15.9 MHz. The series impedance is kept relatively low in order to maintain adequate total harmonic distortion (THD) performance. Similar differential and common model low pass filters are present on all inputs.

Figure 3-1 Input Terminal Blocks and Headers (Schematic)
GUID-8FCBC3FC-2CD4-4AC8-9BE8-C884E730E350-low.gif Figure 3-2 Input Terminal Blocks and Headers (PCB)
Table 3-1 Analog Input Terminal Blocks, J1–J4
Terminal Block Pin Function ADS131A04 Input Pin(s)
J1 1 Channel 0 positive input AIN0P
2 EVM ground AGND and DGND
3 Channel 0 negative input AIN0N
J2 1 Channel 1 positive input AIN1P
2 EVM ground AGND and DGND
3 Channel 1 negative input AIN1N
J3 1 Channel 2 positive input AIN2P
2 EVM ground AGND and DGND
3 Channel 2 negative input AIN2N
J4 1 Channel 3 positive input AIN3P
2 EVM ground AGND and DGND
3 Channel 3 negative input AIN3N