SBAU353 October   2021

 

  1.   Trademarks
  2. 1EVM Overview
    1. 1.1 ADS131A04EVM Kit
    2. 1.2 ADS131A04EVM Board
  3. 2ADS131A04EVM Quick Start Guide
  4. 3EVM Analog Interface
    1. 3.1 ADC Analog Input Signal Path
    2. 3.2 ADC External Clock (XTAL1/CLKIN and XTAL2) Options
  5. 4Digital Interface
    1. 4.1 SPI Communication
    2. 4.2 Connection to the PHI
    3. 4.3 Digital Header
    4. 4.4 LaunchPad Connectors
  6. 5Power Supplies
  7. 6ADS131A04EVM Initial Setup
    1. 6.1 Default Jumper Settings
    2. 6.2 EVM Graphical User Interface (GUI) Software Installation
  8. 7ADS131A04EVM Software Reference
    1. 7.1 EVM GUI Global Settings for ADC Control
    2. 7.2 Register Map Configuration Tool
    3. 7.3 Time Domain Display Tool
    4. 7.4 Spectral Analysis Tool
    5. 7.5 Histogram Tool
  9. 8ADS131A04EVM Bill of Materials, PCB Layout, and Schematic
    1. 8.1 Bill of Materials
    2. 8.2 PCB Layout
    3. 8.3 Schematic
  10. 9References

5 Power Supplies

The PHI provides multiple power-supply options for the EVM, derived from the USB supply of the computer which is routed to EVM_RAW_5V on the ADS131A04EVM on the board.

The EEPROM on the ADS131A04EVM uses a 3.3-V power supply, EVM_ID_PWR, generated directly by the PHI. The 3.3-V supply to the digital section of the ADC, 3V3_IOVDD, is provided directly by a separate LDO on the PHI.

The analog supply of the ADC, AVDD, is powered by the TPS71733 onboard the EVM, which is a low-noise linear regulator that uses the 5-V supply on the PHI to generate a cleaner 3.3-V output. There is also an inverting charge pump regulator, TPS60403, and fixed-output LDO, TPS72325, which converts the 5-V to -2.5-V.

The user has the option to configure the EVM for unipolar supplies (AVSS = 0V and AVDD = 3.3V) by placing a jumper to cover pins 1 and 2 of JP3, or to configure the EVM for bidirectional supplies (AVSS = -2.5 V and AVDD = 2.5 V) by placing the jumper to cover pins 2 and 3 of JP3. The TPS2115 and TLV3691 work to automatically select the correct value for AVDD so that the AVDD to AVSS voltage does not go above the recommended operating conditions.

AVDD is used as the supply for the REF5025, which is a drift precision series voltage reference that outputs 2.5 V with respect to AVSS. This can be used to supply REFEXT for the ADS131A04 using JP2.

The power supply for each active component on the EVM is bypassed with a ceramic capacitor placed close to that component. Additionally, the EVM layout uses thick traces or large copper fill areas, where possible, between bypass capacitors and their loads to minimize inductance along the load current path.

As mentioned previously in Section 1, power to the EVM is supplied by the PHI through connector J5. For information about PHI pins and the power connections, see Table 4-1.

With modifications, the user may use external supplies for either AVDD or DVDD. AVDD can be driven externally by uninstalling R16. Power can then be applied through the AVDD test point at TP6. DVDD can be driven externally from the DVDD test point at TP1 if R100 is removed from the EVM.