SBAA222A October   2017  – April 2025 ADS1282-SP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Overview
  5. 2 SEE Mechanisms
  6. 3 Test Device and Evaluation Board
  7. 4 Irradiation Facility and Setup
    1. 4.1 Depth, Range, and LETeff Calculation
  8. 5 Test Setup and Procedures
    1. 5.1 SEE Testing Block Diagram
    2. 5.2 Test Parameters
    3. 5.3 Test Conditions
  9. 6 SET Test Results
  10. 7 SEL Test Results
  11. 8 Conclusions
  12. 9 Acknowledgment
  13. 10References
  14. 11Revision History

3 Test Device and Evaluation Board

The ADS1282-SP is packaged in a 28-pin dual ceramic flat-pack (HKV) package. The pinout of this device is shown in Figure 3-1. Photographs of the device with and without the lid are shown in Figure 3-2. The test board used for the SEE testing is shown in Figure 3-3. The schematics of the device under test (DUT) test-board configurations are shown in Figure 3-4, Figure 3-5, and Figure 3-6.

ADS1282-SP Pinout DiagramFigure 3-1 ADS1282-SP Pinout Diagram
Device Under Test (DUT) With and Without LidFigure 3-2 Device Under Test (DUT) With and Without Lid
DUT Test Board Figure 3-3 DUT Test Board
DUT Schematic, DVDD > 2.25V Figure 3-4 DUT Schematic, DVDD > 2.25V
DUT Schematic, DVDD < 2.25V Figure 3-5 DUT Schematic, DVDD < 2.25V
Input Power Circuit Figure 3-6 Input Power Circuit