ZHCSSY1 august   2023 UCC23113

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Function
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Power Ratings
    6. 6.6 Insulation Specifications
    7. 6.7 Electrical Characteristics
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Propagation Delay, Rise Time and Fall Time
    2. 7.2 IOH and IOL testing
    3. 7.3 CMTI Testing
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Supply
      2. 8.3.2 Input Stage
      3. 8.3.3 Output Stage
      4. 8.3.4 Protection Features
        1. 8.3.4.1 Undervoltage Lockout (UVLO)
        2. 8.3.4.2 Active Pulldown
        3. 8.3.4.3 Short-Circuit Clamping
    4. 8.4 Device Functional Modes
      1. 8.4.1 ESD Structure
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Selecting the Input Resistor
        2. 9.2.2.2 Gate Driver Output Resistor
        3. 9.2.2.3 Estimate Gate-Driver Power Loss
        4. 9.2.2.4 Estimating Junction Temperature
        5. 9.2.2.5 Selecting VDD Capacitor
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 PCB Material
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 第三方产品免责声明
      2. 12.1.2 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 接收文档更新通知
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 静电放电警告
    7. 12.7 术语表
  14. 13Mechanical, Packaging, and Orderable Information

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订购信息

6.7 Electrical Characteristics

Over recommended operating conditions unless otherwise noted. All typical values are at TA = 25°C, VDD–VEE= 15V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
IFLH Input Forward Threshold Current Low to High VDD - VEE = 15V

1.5

2.8

4

 mA
VF Input Forward Voltage  IF =10 mA 1.8

2.1

2.4

 V
ΔVF/ΔT Temp Coefficient of Input Forward Voltage  IF =10 mA

1

1.35

 mV/ºC
VR Input Reverse Breakdown Voltage IR= 10 uA 6 V
CIN Input Capacitance F = 0.5 MHz

15

 pF
OUTPUT
IOH Output Peak Source Current IF = 10 mA, VDD =15V, CLOAD=0.18uF, CVDD=10uF, pulse width <10us

5

 A
IOL Output Peak Sink Current VF= 0 V , VDD =15V, CLOAD=0.18uF, CVDD=10uF, pulse width <10us

5

 A

VOH

 High Level Output Voltage IF = 10 mA, IO= -20mA VDD-0.07

VDD-0.18

VDD-0.36

V
IF = 10 mA, IO= 0 mA

VDD

V
VOL Low Level Output Voltage VF = 0 V, IO= 20 mA

25

mV
IDD_H Output Supply Current (Diode On) IF = 10 mA, IO= 0 mA 2.2 mA
IDD_L Output Supply Current (Diode Off) VF = 0 V, IO= 0 mA 2 mA
UNDER VOLTAGE LOCKOUT
UVLOR Under Voltage Lockout VDD rising (12V UVLO) IF=10 mA 11 12.5 13.5 V
UVLOF Under Voltage Lockout VDD falling (12V UVLO) IF=10 mA 10

11.5

 12.5 V
UVLOHYS UVLO Hysteresis (12V UVLO) IF=10 mA 1.0 V