ZHCSJI3H March   2007  – August 2022 TS3A24159

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics for 3-V Supply
    6. 6.6  Electrical Characteristics for 2.5-V Supply
    7. 6.7  Electrical Characteristics for 1.8-V Supply
    8. 6.8  Switching Characteristics for a 3-V Supply
    9. 6.9  Switching Characteristics for a 2.5-V Supply
    10. 6.10 Switching Characteristics for a 1.8-V Supply
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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6.7 Electrical Characteristics for 1.8-V Supply

VCC = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER TEST CONDITIONS TA VCC MIN TYP MAX UNIT
ANALOG SWITCH
Analog signal
range		 VCOM, VNO,
VNC		 0 VCC V
Peak ON
resistance		 rpeak 0 ≤ (VNO or VNC) ≤VCC,
ICOM = –2 mA,		 Switch ON,
See Figure 7-1		 25°C 1.65 V 0.4 0.7 Ω
Full 0.8
ON-state
resistance		 ron VNO or VNC = 1.5 V,
ICOM = –2 mA,		 Switch ON,
See Figure 7-1		 25°C 1.65 V 0.3 0.45 Ω
Full 0.5
ANALOG SWITCH (continued)
ON-state
resistance match between
channels		 Δron VNO or VNC = 0.6 V, 1.5 V,
ICOM = –2 mA,		 Switch ON,
See Figure 7-1		 25°C 1.65 V 0.02 0.04 Ω
Full 0.05
ON-state
resistance
flatness		 ron(flat) 0 ≤ (VNO or VNC) ≤ VCC,
ICOM = –2 mA,		 Switch ON,
See Figure 7-1		 25°C 1.65 V 0.13 Ω
VNO or VNC = 0.6 V, 1.5 V,
ICOM = –8 mA,		 Switch ON,
See Figure 7-1		 25°C 0.08 0.15
Full 0.2
NC, NO
OFF leakage
current		 INC(OFF),
INO(OFF)		 VNC or VNO = 0.3 V, VCOM = 1.65 V,
or
VNC or VNO = 1.65 V, VCOM = 0.3 V,		 Switch OFF,
See Figure 7-2		 25°C 1.95 –10 10 nA
Full –50 50
NC, NO
ON leakage
current		 INC(ON),
INO(ON)		 VNC or VNO = 0.3 V, VCOM = Open,
or
VNC or VNO = 1.65 V, VCOM = Open,		 Switch ON,
See Figure 7-3		 25°C 1.95 V –10 10 nA
Full –100 100
COM
ON leakage
current		 ICOM(ON) VNC or VNO = Open, VCOM = 0.3 V,
or
VNC or VNO = Open, VCOM = 1.65 V,		 Switch ON,
See Figure 7-3		 25°C 1.95 V –10 10 nA
Full –100 100
DIGITAL CONTROL INPUTS (IN1, IN2)(2)
Input logic high VIH Full 1 V
Input logic low VIL Full 0.4 V
Input leakage
current		 IIH, IIL VI = 1.95 V or 0 25°C 1.95 V –40 5 40 nA
Full –50 50
DYNAMIC
Charge injection QC VGEN = 0,
RGEN = 0,		 CL = 1 nF,
See Figure 7-10		 25°C 1.8 V 5 pC
NC, NO
OFF capacitance		 CNC(OFF),
CNO(OFF)		 VNC or VNO = VCC or GND,
Switch OFF,		 See Figure 7-4 25°C 1.8 V 90 pF
NC, NO
ON capacitance		 CNC(ON),
CNO(ON)		 VNC or VNO = VCC or GND,
Switch ON,		 See Figure 7-4 25°C 1.8 V 250 pF
COM
ON capacitance		 CCOM(ON) VCOM = VCC or GND,
Switch ON,		 See Figure 7-4 25°C 1.8 V 250 pF
Digital input
capacitance		 CIN VI = VCC or GND, See Figure 7-4 25°C 1.8 V 2 pF
Bandwidth BW RL = 50 Ω,
Switch ON,		 See Figure 7-7 25°C 1.8 V 23 MHz
OFF isolation OISO RL = 50 Ω,
f = 1 MHz,		 See Figure 7-8 25°C 1.8 V –73 dB
Crosstalk XTALK RL = 50 Ω,
f = 1 MHz,		 See Figure 7-9 25°C 1.8 V –97 dB
Total harmonic
distortion		 THD RL = 600 Ω,
CL = 50 pF,		 f = 20 Hz to 20 kHz,
See Figure 7-11		 25°C 1.8 V 0.005%
SUPPLY
Positive supply
current		 ICC VI = VCC or GND 25°C 1.95 V 100 50 nA
Full 700
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(2) All unused digital inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs.