ZHCSOF9B april   2022  – june 2023 TPS25981

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
      1.      16
    8. 7.8 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO and UVP)
      2. 8.3.2 Overvoltage Lockout (OVLO)
      3. 8.3.3 Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 8.3.3.1 Slew Rate (dVdt) and Inrush Current Control
        2. 8.3.3.2 Circuit-Breaker During Steady-State
        3. 8.3.3.3 Active Current Limiting During Start-Up
        4. 8.3.3.4 Short-Circuit Protection
      4. 8.3.4 Analog Load Current Monitor
      5. 8.3.5 Overtemperature Protection (OTP)
      6. 8.3.6 Fault Response and Indication (FLT)
      7. 8.3.7 Power Good Indication (PG)
      8. 8.3.8 Quick Output Discharge (QOD)
      9. 8.3.9 Reverse Current Blocking FET Driver
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Single Device, Self-Controlled
      2. 9.1.2 Parallel Operation
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Device Selection
        2. 9.2.2.2 Setting Output Voltage Rise Time (tR)
        3. 9.2.2.3 Setting Overcurrent Threshold (ILIM)
        4. 9.2.2.4 Setting Overcurrent Blanking Interval (tITIMER)
        5. 9.2.2.5 Voltage Drop
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 Output Short-Circuit Measurements
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 静电放电警告
    6. 12.6 术语表
  14. 13Mechanical, Packaging, and Orderable Information

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9.2.2.2 Setting Output Voltage Rise Time (tR)

For a successful design, the junction temperature of device must be kept below the absolute maximum rating during both dynamic (start-up) and steady-state conditions. Dynamic power stresses often are an order of magnitude greater than the static stresses, so it is important to determine the right start-up time and inrush current limit required with system capacitance to avoid thermal shutdown during start-up.

The slew rate (SR) needed to achieve the desired output rise time can be calculated as:

Equation 9. S R   V m s = V I N   V t R   m s =   3.3   V 2.2   m s = 1.5   V m s  

The CdVdt needed to achieve this slew rate can be calculated as:

Equation 10. C d V d t   p F = 3300 S R   V m s = 3300 1.5   V m s   = 2200   p F

Choose the nearest standard capacitor value as 2200 pF.

For this slew rate, the inrush current can be calculated as:

Equation 11. I I N R U S H   m A = C O U T   µ F   × S R   V m s =   10   µ F   ×   1.5   V m s   = 15   m A

The average power dissipation inside the part during inrush can be calculated as:

Equation 12. P D I N R U S H   ( m W )   = 0.5   ×   V I N   V   ×   I I N R U S H   m A =   0.5   × 3.3   V × 15   m A = 25   m W
For the given power dissipation, the thermal shutdown time of the device must be greater than the ramp-up time tR to avoid start-up failure. Figure 9-9 shows the thermal shutdown limit, for 0.025 W of power, the shutdown time is more than 10 s which is very large as compared to tR = 2.2 ms. Therefore, it is safe to use 2.2 ms as the start-up time for this application.
GUID-20220407-SS0I-VFDM-FLDN-PRZFFK3NT4CG-low.svg Figure 9-9 Thermal Shutdown Plot During Inrush