SLVSJG7
May 2026
TPS25751A
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.1.1
TPS25751AD and TPS25751AS - Absolute Maximum Ratings
6.1.2
TPS25751AD - Absolute Maximum Ratings
6.1.3
TPS25751AS - Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.3.1
TPS25751AD - Recommended Operating Conditions
6.3.2
TPS25751AS - Recommended Operating Conditions
6.4
Recommended Capacitance
6.5
Thermal Information
6.5.1
TPS25751AD - Thermal Information
6.5.2
Thermal Information
6.6
Power Supply Characteristics
6.7
Power Consumption
6.8
PP_5V Power Switch Characteristics
6.9
PPHV Power Switch Characteristics - TPS25751AD
6.10
PP_EXT Characteristics - TPS25751AS
6.11
Power Path Supervisory
6.12
CC Cable Detection Parameters
6.13
CC VCONN Parameters
6.14
CC PHY Parameters
6.15
Thermal Shutdown Characteristics
6.16
ADC Characteristics
6.17
Input/Output (I/O) Characteristics
6.18
BC1.2 Characteristics
6.19
I2C Requirements and Characteristics
6.20
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
USB-PD Physical Layer
8.3.1.1
USB-PD Encoding and Signaling
8.3.1.2
USB-PD Bi-Phase Marked Coding
8.3.1.3
USB-PD Transmit (TX) and Receive (Rx) Masks
8.3.1.4
USB-PD BMC Transmitter
8.3.1.5
USB-PD BMC Receiver
8.3.1.6
Squelch Receiver
8.3.2
Power Management
8.3.2.1
Power-On And Supervisory Functions
8.3.2.2
VBUS LDO
8.3.3
Power Paths
8.3.3.1
Internal Sourcing Power Paths
8.3.3.1.1
PP_5V Current Clamping
8.3.3.1.2
PP_5V Local Overtemperature Shut Down (OTSD)
8.3.3.1.3
PP_5V OVP
8.3.3.1.4
PP_5V UVLO
8.3.3.1.5
PP_5V Reverse Current Protection
8.3.3.1.6
PP_CABLE Current Clamp
8.3.3.1.7
PP_CABLE Local Overtemperature Shut Down (OTSD)
8.3.3.1.8
PP_CABLE UVLO
8.3.3.2
TPS25751AD Internal Powerpath
8.3.3.2.1
Overvoltage Protection (OVP)
8.3.3.2.2
Reverse-Current Protection (RCP)
8.3.3.2.3
VBUS UVLO
8.3.3.2.4
Discharging VBUS to Safe Voltage
8.3.3.3
External Powerpath Control PP_EXT
8.3.3.3.1
Overvoltage Protection (OVP)
8.3.3.3.2
Reverse-Current Protection (RCP)
8.3.3.3.3
VBUS UVLO
8.3.3.3.4
Discharging VBUS to Safe Voltage
8.3.4
Cable Plug and Orientation Detection
8.3.4.1
Configured as a Source
8.3.4.2
Configured as a Sink
8.3.4.3
Configured as a DRP
8.3.4.4
Dead Battery Advertisement
8.3.5
Overvoltage Protection (CC1, CC2)
8.3.6
Default Behavior Configuration (ADCIN1, ADCIN2)
8.3.7
ADC
8.3.8
Liquid Detection
8.3.9
BC 1.2 (USB_P, USB_N)
8.3.10
Digital Interfaces
8.3.10.1
General GPIO
8.3.10.2
I2C Interface
8.3.10.2.1
I2C Interface Description
8.3.10.2.1.1
I2C Clock Stretching
8.3.10.2.1.2
I2C Address Setting
8.3.10.2.1.3
Unique Address Interface
8.3.10.2.1.4
Pin Strapping to Configure Default Behavior
8.3.11
Digital Core
8.4
Device Functional Modes
8.4.1
Power States
8.4.2
Schottky for Current Surge Protection
8.4.3
Thermal Shutdown
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Liquid Detection Design Requirements
9.2.1.2
BC1.2 Application Design Requirements
9.2.1.3
USB Data Support Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Liquid Detection
9.2.2.2
BC1.2 Application
9.2.2.3
USB Data Support
9.2.3
Application Curves
9.2.3.1
Liquid Detection Application Curves
9.2.3.2
BC1.2 Application Curves
9.2.3.3
USB Data Support Application Curves
9.3
Power Supply Recommendations
9.3.1
3.3V Power
9.3.1.1
VIN_3V3 Input Switch
9.3.2
1.5V Power
9.3.3
Recommended Supply Load Capacitance
9.4
Layout
9.4.1
TPS25751AD - Layout
9.4.1.1
Layout Guidelines
9.4.1.1.1
Recommended Via Size
9.4.1.1.2
Minimum Trace Widths
9.4.1.2
Layout Example
9.4.1.2.1
TPS25751AD Schematic Layout Example
9.4.1.2.2
TPS25751AD Layout Example - PCB Plots
9.4.1.2.2.1
TPS25751AD Component Placement
9.4.1.2.2.2
TPS25751AD PP5V
9.4.1.2.2.3
TPS25751AD PPHV
9.4.1.2.2.4
TPS25751AD VBUS
9.4.1.2.2.5
TPS25751AD I/O (I2C, ADCINs, GPIOs)
9.4.1.2.2.6
TPS25751AD DRAIN
9.4.1.2.2.7
TPS25751AD GND
9.4.2
TPS25751AS - Layout
9.4.2.1
Layout Guidelines
9.4.2.1.1
Recommended Via Size
9.4.2.1.2
Minimum Trace Widths
9.4.2.2
Layout Example
9.4.2.2.1
TPS25751AS Schematic Layout Example
9.4.2.2.2
TPS25751AS Layout Example - PCB Plots
9.4.2.2.2.1
TPS25751AS Component Placement
9.4.2.2.2.2
TPS25751AS PP5V
9.4.2.2.2.3
TPS25751AS PP_EXT
9.4.2.2.2.4
TPS25751AS VBUS
9.4.2.2.2.5
TPS25751AS I/O
9.4.2.2.2.6
TPS25751AS PPEXT Gate Driver
9.4.2.2.2.7
TPS25751AS GND
10
Device and Documentation Support
10.1
Device Support
10.1.1
Third-Party Products Disclaimer
10.2
Documentation Support
10.2.1
Related Documentation
10.3
Receiving Notification of Documentation Updates
10.4
Support Resources
10.5
Trademarks
10.6
Electrostatic Discharge Caution
10.7
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
RSM|32
MPQF195B
散热焊盘机械数据 (封装 | 引脚)
RSM|32
QFND112H
订购信息
slvsjg7_oa
slvsjg7_pm
10.1
Device Support