ZHCSKV6B March   2020  – February 2024 TPA6211T-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Operating Characteristics
    7. 5.7 Dissipation Ratings
    8.     Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Advantages of Fully Differential Amplifiers
      2. 6.3.2 Fully Differential Amplifier Efficiency and Thermal Information
      3. 6.3.3 Differential Output Versus Single-Ended Output
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical Differential Input Application
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Resistors (RI)
          2. 7.2.1.2.2 Bypass Capacitor (CBYPASS) and Start-Up Time
          3. 7.2.1.2.3 Input Capacitor (CI)
          4. 7.2.1.2.4 Band-Pass Filter (RI, CI, and CF)
            1. 7.2.1.2.4.1 Step 1: Low-Pass Filter
            2. 7.2.1.2.4.2 Step 2: High-Pass Filter
            3. 7.2.1.2.4.3 Step 3: Additional Low-Pass Filter
          5. 7.2.1.2.5 Decoupling Capacitor (CS)
          6. 7.2.1.2.6 Using Low-ESR Capacitors
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Other Application Circuits
  9. 8 Power Supply Recommendations
    1. 8.1 Power Supply Decoupling Capacitor
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Community Resources
    3. 10.3 Trademarks
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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4 Pin Configuration and Functions

GUID-354F9AC5-DA9F-41BD-B1E9-B4553A084C19-low.svg Figure 4-1 DGN Package8-Pin HVSSOPTop View
Table 4-1 Pin Functions
PIN I/O1 DESCRIPTION
NAME NO.
BYPASS 2 I Mid-supply voltage, adding a bypass capacitor improves PSRR
GND 7 I High-current ground
IN– 4 I Negative differential input
IN+ 3 I Positive differential input
SHUTDOWN 1 I Shutdown pin (active low logic)
Thermal Pad — — Connect to ground. Thermal pad must be soldered down in all applications to properly secure device on the PCB.
VDD 6 I Power supply
VO+ 5 O Positive BTL output
VO– 8 O Negative BTL output
  1. I = Input, O = Output