ZHCSLO8D November   2020  – January 2022 TMUX6208 , TMUX6209

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Thermal Information
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Source or Drain Continuous Current
    6. 7.6  ±15 V Dual Supply: Electrical Characteristics 
    7. 7.7  ±15 V Dual Supply: Switching Characteristics 
    8. 7.8  36 V Single Supply: Electrical Characteristics 
    9. 7.9  36 V Single Supply: Switching Characteristics 
    10. 7.10 12 V Single Supply: Electrical Characteristics 
    11. 7.11 12 V Single Supply: Switching Characteristics 
    12. 7.12 ±5 V Dual Supply: Electrical Characteristics 
    13. 7.13 ±5 V Dual Supply: Switching Characteristics 
    14. 7.14 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1  On-Resistance
    2. 8.2  Off-Leakage Current
    3. 8.3  On-Leakage Current
    4. 8.4  Transition Time
    5. 8.5  tON(EN) and tOFF(EN)
    6. 8.6  Break-Before-Make
    7. 8.7  tON (VDD) Time
    8. 8.8  Propagation Delay
    9. 8.9  Charge Injection
    10. 8.10 Off Isolation
    11. 8.11 Crosstalk
    12. 8.12 Bandwidth
    13. 8.13 THD + Noise
    14. 8.14 Power Supply Rejection Ratio (PSRR)
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Bidirectional Operation
      2. 9.3.2 Rail-to-Rail Operation
      3. 9.3.3 1.8 V Logic Compatible Inputs
      4. 9.3.4 Integrated Pull-Down Resistor on Logic Pins
      5. 9.3.5 Fail-Safe Logic
      6. 9.3.6 Latch-Up Immune
      7. 9.3.7 Ultra-Low Charge Injection
    4. 9.4 Device Functional Modes
    5. 9.5 Truth Tables
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
    3. 10.3 Design Requirements
    4. 10.4 Detailed Design Procedure
    5. 10.5 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 接收文档更新通知
    3. 13.3 支持资源
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 术语表
  14. 14Mechanical, Packaging, and Orderable Information

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6 Pin Configuration and Functions

GUID-20201209-CA0I-CB0R-DVNN-BH6VQHJ49DS6-low.gifFigure 6-1 TMUX6208: PW Package16-Pin TSSOPTop View
GUID-EF7612C2-A3A0-4ACD-B947-DB97A563F34C-low.gifFigure 6-2 TMUX6208: RUM Package16-Pin WQFNTop View
Table 6-1 TMUX6208 Pin Functions
NAME PW NO. RUM NO. TYPE(1) DESCRIPTION(2)
A0 1 15 I Logic control input, has internal 4 MΩ pull-down resistor. Controls the switch configuration as shown in Section 9.5.
A1 16 14 I Logic control input, has internal 4 MΩ pull-down resistor. Controls the switch configuration as shown in Section 9.5.
A2 15 13 I Logic control input, has internal 4 MΩ pull-down resistor. Controls the switch configuration as shown in Section 9.5.
D 8 6 I/O Drain pin. Can be an input or output.
EN 2 16 I Active high logic enable, has internal 4 MΩ pull-down resistor. When this pin is low, all switches are turned off. When this pin is high, the Ax logic input determines which switch is turned on.
GND 14 12 P Ground (0 V) reference.
S1 4 2 I/O Source pin 1. Can be an input or output.
S2 5 3 I/O Source pin 2. Can be an input or output.
S3 6 4 I/O Source pin 3. Can be an input or output.
S4 7 5 I/O Source pin 4. Can be an input or output.
S5 12 10 I/O Source pin 5. Can be an input or output.
S6 11 9 I/O Source pin 6. Can be an input or output.
S7 10 8 I/O Source pin 7. Can be an input or output.
S8 9 7 I/O Source pin 8. Can be an input or output.
VDD 13 11 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 μF to 10 μF between VDD and GND.
VSS 3 1 P Negative power supply. This pin is the most negative power-supply potential. In single-supply applications, this pin can be connected to ground. For reliable operation, connect a decoupling capacitor ranging from 0.1 μF to 10 μF between VSS and GND.
Thermal Pad — The thermal pad is not connected internally. It is recommended that the pad be tied to GND or VSS for best performance.
(1) I = input, O = output, I/O = input and output, P = power.
(2) Refer to Section 9.4 for what to do with unused pins.
GUID-86321B2D-7B5D-406C-A5E4-9DDEE8151042-low.gifFigure 6-3 TMUX6209: PW Package16-Pin TSSOPTop View
GUID-6FA4950C-04A7-402F-A179-DDF82EAEDD3B-low.gifFigure 6-4 TMUX6209: RUM Package16-Pin WQFNTop View
Table 6-2 TMUX6209 Pin Functions
NAME PW NO. RUM NO. TYPE(1) DESCRIPTION(2)
A0 1 15 I Logic control input, has internal pull-down resistor. Controls the switch configuration as shown in Section 9.5.
A1 16 14 I Logic control input, has internal pull-down resistor. Controls the switch configuration as shown in Section 9.5.
DA 8 6 I/O Drain Terminal A. Can be an input or an output.
DB 9 7 I/O Drain Terminal B. Can be an input or an output.
EN 2 16 I Active high logic enable, has internal pull-up resistor. When this pin is low, all switches are turned off. When this pin is high, the Ax logic input determines which switch is turned on.
GND 15 13 P Ground (0 V) reference.
S1A 4 2 I/O Source pin 1A. Can be an input or output.
S1B 13 11 I/O Source pin 1B. Can be an input or output.
S2A 5 3 I/O Source pin 2A. Can be an input or output.
S2B 12 10 I/O Source pin 2B. Can be an input or output.
S3A 6 4 I/O Source pin 3A. Can be an input or output.
S3B 11 9 I/O Source pin 3B. Can be an input or output.
S4A 7 5 I/O Source pin 4A. Can be an input or output.
S4B 10 8 I/O Source pin 4B. Can be an input or output.
VDD 14 12 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 μF to 10 μF between VDD and GND.
VSS 3 1 P Negative power supply. This pin is the most negative power-supply potential. In single-supply applications, this pin can be connected to ground. For reliable operation, connect a decoupling capacitor ranging from 0.1 μF to 10 μF between VSS and GND.
Thermal Pad __ The thermal pad is not connected internally. It is recommended that the pad be tied to GND or VSS for best performance.
(1) I = input, O = output, I/O = input and output, P = power.
(2) Refer to Section 9.4 for what to do with unused pins.