ZHCSAT9I september   2012  – october 2020 SN65DSI83

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings #GUID-BDB96F65-5C5F-4805-AA4B-B71B15ADA38F/SLLSEB91839
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Clock Configurations and Multipliers
      2. 7.3.2 ULPS
      3. 7.3.3 LVDS Pattern Generation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Reset Implementation
      2. 7.4.2 Initialization Sequence
      3. 7.4.3 LVDS Output Formats
      4. 7.4.4 DSI Lane Merging
      5. 7.4.5 DSI Pixel Stream Packets
      6. 7.4.6 DSI Video Transmission Specifications
    5. 7.5 Programming
      1. 7.5.1 Local I2C Interface Overview
    6. 7.6 Register Maps
      1. 7.6.1 Control and Status Registers Overview
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Video STOP and Restart Sequence
      2. 8.1.2 Reverse LVDS Pin Order Option
      3. 8.1.3 IRQ Usage
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Example Script
      3. 8.2.3 Application Curve
  10. 9 Power Supply Recommendations
    1. 9.1 VCC Power Supply
    2. 9.2 VCORE Power Supply
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Package Specific
      2. 10.1.2 Differential Pairs
      3. 10.1.3 Ground
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
  13.   Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 Revision History

Changes from Revision H (June 2018) to Revision I (October 2020)

  • 将 u*jrBGA ZQE 更改为 nFBGA ZXHGo
  • Changed u*jr ZQE to nFBGA ZXHGo
  • Changed u*jr ZQE to nFBGA ZXH. Updated thermal informationGo
  • Changed u*jr ZQE to nFBGA ZXHGo

Changes from Revision G (June 2015) to Revision H (June 2018)

  • Deleted figure RESET and Initialization Timing Definition While VCC is High Go
  • Changed the paragraph following Figure 7-3 Go
  • Changed Recommended Initialization Sequence To: Initialization Sequence Go
  • Changed Table 7-2 Go
  • Changed item 3 in Video Stop and Restart Sequence From: Drive all DSI input lanes including DSI CLK lane to LP11. To: Drive all DSI data lanes to LP11, but keep the DSI CLK lanes in HS. Go

Changes from Revision F (May 2015) to Revision G (June 2015)

  • Moved Recommended Initialization Setup Sequence Go
  • Changed SN65DSI83 DSI Lane Merging Illustration back to original imageGo

Changes from Revision E (October 2013) to Revision F (May 2015)

  • 添加了引脚配置和功能 部分、ESD 等级 表、特性说明 部分、器件功能模式、应用和实施 部分、电源相关建议 部分、布局 部分、器件和文档支持 部分以及机械、封装和可订购信息 部分Go
  • 根据全新 TI 标准更新了数据表，添加了章节并重新编排了内容Go
  • Updated the SN65DSI83 FlatLink Timing Definitions diagramGo
  • Changed Functional Block Diagram Go
  • Changed SN65DSI83 DSI Lane Merging Illustration Go
  • Changed from: 1366 × 768 WXGA to:1280 × 800 WXGA Go
  • Changed Design Parameters table valuesGo
  • Changed Detailed Design Procedure values and textGo
  • Changed Example Script subsection Go

Changes from Revision D (December 2012) to Revision E (October 2013)

  • 将状态从“产品预发布”更改为“量产数据”Go
  • Added rows for bits 7 and 6:5 to Table 7-6 CSR Bit Field Definitions - DSI RegistersGo
  • Added row for Bit 4 to Table 7-7 CSR Bit Field Definitions - LVDS RegistersGo

Changes from Revision A (September 2012) to Revision B (December 2012)

  • Changed the value of VOH From: 1.3 MIN To: 1.25 MINGo
  • Changed the ICC TYP value From: TBD To: 77 and MAX value From: TBD To: 112 Go
  • Added a TYP value of 7.7 to IULPS Go
  • Changed the IRST TYP value From: 0.05 To: 0.04 and MAX value From: 0.2 To: 0.06Go
  • changed the values of |VOD|Go
  • Changed the values of VOC(SS) for test conditions CSR 0x19.6 = 0Go
  • Added table note 2Go
  • Added table note 3Go
  • Changed the tsetup and thold NOM value of 1.5 to a MIN value of 1.5Go
  • Changed the SWITCHING CHARACTERISTICS tableGo
  • Changed the description of CHA_LVDS_VOD_SWINGGo

Changes from Revision * (August 2012) to Revision A (September 2012)

  • 将“特性”从“最大分辨率高达 60fps WUXGA 1920 × 1200（18bpp 和 24bpp 彩色），缩短消隐时间。适合 60fps 1366 × 768（18bpp 和 24bpp）”更改为“最大分辨率高达 60fps WUXGA 1920 × 1200（18bpp 和 24bpp 彩色），缩短消隐时间。适合 60fps 1366 × 768/1280 × 800（18bpp 和 24bpp）”Go
  • 更改了“说明”部分第二段中的文本，从“使用 60fps 1366 × 768（18bpp 和 24bpp）的应用。”修改为“使用 60fps 1366 × 768/1280 × 800（18bpp 和 24bpp）的应用。”Go