SLVSKC6 December   2025 RES31A

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1 DC Measurement Configurations
    2. 6.2 AC Measurement Configurations
    3. 6.3 Error Notation and Units
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Ratiometric Matching for Low Gain Error
        1. 7.3.1.1 Absolute and Ratiometric Tolerances
      2. 7.3.2 Ratiometric Drift
      3. 7.3.3 Ultra-Low Noise
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Amplifier Feedback Circuit
        1. 8.1.1.1 Amplifier Feedback Circuit Example
      2. 8.1.2 Voltage Divider Circuit
        1. 8.1.2.1 Voltage Divider Circuit Example
        2. 8.1.2.2 Voltage-Divider Circuit Drift
      3. 8.1.3 Discrete Difference Amplifier
        1. 8.1.3.1 Difference-Amplifier Common-Mode Rejection Analysis
        2. 8.1.3.2 Difference-Amplifier Gain Error Analysis
      4. 8.1.4 Discrete Instrumentation Amplifiers
      5. 8.1.5 Fully Differential Amplifier
      6. 8.1.6 Unconventional Circuits
        1. 8.1.6.1 Single-Channel Voltage Divider
        2. 8.1.6.2 Single-Channel Amplifier Gain
        3. 8.1.6.3 Unconventional Instrumentation Amplifiers
    2. 8.2 Typical Application
      1. 8.2.1 Common-Mode Shifting Input Stage
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 9.1.1.3 TI Reference Designs
        4. 9.1.1.4 Analog Filter Designer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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Voltage Divider Circuit

As alluded in Section 6.1, the RES31A is typically used as an input signal level-shifter or voltage divider. This circuit is generically drawn in the following figure.

RES31A Generic Voltage Divider
                    Circuit Figure 8-4 Generic Voltage Divider Circuit
Equation 23. G V D = R Y R Y + R X
Equation 24. V OUT = V IN × G VD
Equation 25. G V D x = G V D n o m 1 + t V D x

Often, RG and RIN act as RX and RY respectively in this circuit. Substituting these terms gives a transfer function of:

Equation 26. G V D x = R IN x R I N x + R G x = 1 G x + 1

Because GVDx is a direct function of Gx, the ratio tolerance error tVDx of these voltage-divider circuits is a direct function of tDx. Typical and maximum parameter values for tVDx in this configuration are calculated from a given tDx value as follows:

Equation 27. t V D x = G nom × t D x G n o m × t D x + G n o m + 1

For example, if a RES31A40 with tD1 = 130ppm is used in this configuration, the associated tVD1 error is –104ppm. The sign change occurs because a positive tDx error means RG > RGnom or RIN < RINnom. Since the resulting GVDx is less than the nominal value, the error term is negative.

For the alternative case where the positions of RG and RIN are swapped, such that RX = RIN and RY = RIN, the transfer function is:

Equation 28. G V D x = R G x R I N x + R G x = G x G x + 1

The error of this transfer function is described by:

Equation 29. t V D x = t D x G n o m × t D x + G n o m + 1

If the same RES31A40 with tD1 = 130ppm is used in this alternative configuration, the associated tVD1 error is 26ppm. A sign change does not occur because a positive tDx error means RG > RGnom or RIN < RINnom. Because the result GVDx is greater than the nominal value, the error term is again positive.