ZHCSD40P April   2012  – January 2024 LP5907

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Output and Input Capacitors
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Enable (EN)
      2. 6.3.2 Low Output Noise
      3. 6.3.3 Output Automatic Discharge
      4. 6.3.4 Remote Output Capacitor Placement
      5. 6.3.5 Thermal Overload Protection (TSD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Enable (EN)
      2. 6.4.2 Minimum Operating Input Voltage (VIN)
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Custom Design With WEBENCH® Tools
        2. 7.2.2.2 Power Dissipation and Device Operation
        3. 7.2.2.3 External Capacitors
        4. 7.2.2.4 Input Capacitor
        5. 7.2.2.5 Output Capacitor
        6. 7.2.2.6 Capacitor Characteristics
        7. 7.2.2.7 Remote Capacitor Operation
        8. 7.2.2.8 No-Load Stability
        9. 7.2.2.9 Enable Control
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 X2SON Mounting
        2. 7.4.1.2 DSBGA Mounting
        3. 7.4.1.3 DSBGA Light Sensitivity
      2. 7.4.2 Layout Examples
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Custom Design With WEBENCH® Tools
      2. 8.1.2 Related Documentation
    2. 8.2 接收文档更新通知
    3. 8.3 支持资源
    4. 8.4 Trademarks
    5. 8.5 静电放电警告
    6. 8.6 术语表
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Remote Capacitor Operation

The LP5907 requires at least a 1µF capacitor at the OUT pin, but there are no strict requirements about the location of the capacitor in regards to the pin. In practical designs the output capacitor can be located up to 10cm away from the LDO. Which means that there is no need to have a special capacitor close to the output pin if there is already respective capacitors in the system (such as a capacitor at the input of supplied device). The remote capacitor feature helps minimize the number of capacitors in the system.

In general, keep the wiring parasitic inductance at a minimum, which means use traces as wide as possible from the LDO output to the capacitors, thus keeping the LDO output trace layer as close to ground layer as possible and avoiding vias on the path. If vias must be used, use as many vias as possible between the connection layers. Keep parasitic wiring inductance less than 35nH. For applications with fast load transients, use an input capacitor equal to or larger to the sum of the capacitance at the output node for best load transient performance.