ZHCSTV0L November   2001  – February 2025 LP2992

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
        1. 6.3.3.1 Current Limit (Legacy Chip)
        2. 6.3.3.2 Current Limit (New Chip)
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Output Pulldown
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Estimating Junction Temperature
      2. 7.1.2 Input and Output Capacitor Requirements
      3. 7.1.3 Noise Bypass Capacitor (CBYPASS)
      4. 7.1.4 Power Dissipation (PD)
      5. 7.1.5 Recommended Capacitor Types
        1. 7.1.5.1 Recommended Capacitors (Legacy Chip)
          1. 7.1.5.1.1 Tantalum Capacitors (Legacy Chip)
        2. 7.1.5.2 Recommended Capacitors (New Chip)
      6. 7.1.6 Reverse Current
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 ON/OFF Operation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 支持资源
    5. 8.5 Trademarks
    6. 8.6 静电放电警告
    7. 8.7 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 Pin Configuration and Functions



Figure 4-1 DBV Package,5-Pin SOT-23(Top View)

LP2992 NGD Package,6-Pin WSON(Top View)(Legacy Chip)
Figure 4-2 NGD Package,6-Pin WSON(Top View)(Legacy Chip)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME DBV NGD (Legacy chip only)
BYPASS 4 1 I BYPASS pin to achieve low noise performance. Connecting an external capacitor between BYPASS pin and ground reduces reference voltage noise. See the Recommended Operating Conditions table for more information.
GND 2 2 — Ground
ON/OFF 3 3 I Enable pin for the LDO. Driving the ON/OFF pin high enables the device. Driving this pin low disables the device. High and low thresholds are listed in the Electrical Characteristics table. Tie this pin to VIN if unused.
IN 1 4 I Input supply pin. Use a capacitor with a value of 1µF or larger from this pin to ground. See the Input and Output Capacitor Requirements section for more information.
OUT 5 6 O Output of the regulator. Use a capacitor with a value of 2.2µF or larger from this pin to ground(1). See the Input and Output Capacitor Requirements section for more information.
N/C – 5 – No internal connection. Connect to GND or leave open. (Legacy chip only)
DAP – Exposed thermal pad – The exposed die attach pad on the bottom of the package must be connected to a copper thermal pad on the PCB at ground potential. Connect to ground potential or leave floating. Do not connect to any potential other than the same ground potential seen at device pin 2. (Legacy chip only)
(1) The nominal output capacitance must be greater than 1μF. Throughout this document, the nominal derating on these capacitors is 50%. Make sure that the effective capacitance at the pin is greater than 1μF.