ZHCSLT9B March 2022 – July 2022 LMK5B33216
An integrated EEPROM supports user-customized output clocks on start-up when the ROM pages will not meet start-up clocking requirements.
At POR if the EEPROM field ROM_PLUS_EE = 1, after the ROM settings are loaded the EEPROM will overwrite APLL and clock output registers to provide the user programmed EEPROM start-up clocks. If the ROM based DPLL configuration is not valid, the APLLs will simply lock to the XO reference frequency until the DPLL is configured at which time the DPLL will validate the DPLL reference input and proceed to lock.
The factory default setting for the EEPROM field ROM_PLUS_EE = 0.