ZHCSLR8B june   2021  – april 2023 JFE150

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Parameter Measurement Information
    1. 7.1 AC Measurement Configurations
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Ultra-Low Noise
      2. 8.3.2 Low Gate Current
      3. 8.3.3 Input Protection
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Protection Diodes
      2. 9.1.2 Capacitive Transducer Input Stage
      3. 9.1.3 Common-Source Amplifier
      4. 9.1.4 Composite Amplifiers
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 PSpice® for TI
        2. 10.1.1.2 TINA-TI™ 仿真软件(免费下载)
        3. 10.1.1.3 TI 参考设计
        4. 10.1.1.4 滤波器设计工具
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 接收文档更新通知
    4. 10.4 支持资源
    5. 10.5 Trademarks
    6. 10.6 静电放电警告
    7. 10.7 术语表
  12. 11Mechanical, Packaging, and Orderable Information

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Input Protection Diodes

The JFE150 features diodes that are used to help clamp voltage surges that can occur on the input sensor to the gate. The diodes are connected between the gate and two separate pins, VCL and VCH. The clamping mechanism works by steering current from the gate into the VCL or VCH nodes when the voltage at the gate is less than VCL or greater than VCH. Figure 9-2 shows an example of a microphone input circuit where a dc blocking capacitor operates with a large dc voltage. When the microphone input is dropped or shorted, the dc blocking capacitor discharges into the VCL or VCH nodes, thus helping eliminate large signal transient voltages on the gate. There are also clamping diodes from the drain and source to VCL and VCH, respectively. The clamping diodes can withstand high surge currents up to 200 mA for 50 ms; however, limit dc current to less than 20 mA.

GUID-20210518-CA0I-8WBG-22S3-XNPJNGN23Q4X-low.gif Figure 9-1 JFE150 Clamping Diode Example

Figure 9-2 shows an example of configuring the diode clamp to protect the JFET against overvoltage in a phantom-powered microphone circuit. Phantom power typically delivers 48 V through a 6.8-kΩ pullup resistor to a microphone or dynamic load. If the microphone is disconnected, dc blocking capacitor CDC can be biased up to 48 V. If the input to the capacitor is then shorted to ground (shown by the switch in Figure 9-2), the gate voltage can exceed the absolute maximum rating for VGS. In this case, the blocking diode is used, along with current limiting resistors RG and RL, to clamp the gate voltage to a safe level. Be aware that the thermal noise of RG couples directly into the gate input; therefore, make sure to minimize the resistance of RG.

The clamping diodes are not required for operation. The VGS voltage can withstand –40 V, so clamping is not required if the VGS voltage is kept greater than this limit. If the diodes are not needed, leave the VCL and VCH nodes floating.

Most previous-generation JFET devices featured only three pins (gate, source, and drain). For these devices, the gate pin is in the same physical location as the VCL pin on the JFE150. To test the JFE150 in a three-pin socket, short pin 2 of the JFE150 (VCL) to pin 3 (G). When the devices are connected with pin 2 shorted to pin 3, the diode from VCL is shorted out and cannot provide any clamping protection. The input capacitance (CISS) also increases by 1 pF; see Figure 6-12.