SLLSFC3A March   2020  – December 2021 ISO1640-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6.     Insulation Specifications
    7. 6.6  Safety-Related Certifications
    8. 6.7  Safety Limiting Values
    9. 6.8  Electrical Characteristics
    10. 6.9  Supply Current Characteristics
    11. 6.10 Timing Requirements
    12. 6.11 Switching Characteristics
    13. 6.12 Insulation Characteristics Curves
    14. 6.13 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Isolation Technology Overview
    4. 8.4 Feature Description
      1. 8.4.1 Hot Swap
      2. 8.4.2 Protection Features
    5. 8.5 Isolator Functional Principle
      1. 8.5.1 Receive Direction (Left Diagram of Figure 1-1 )
      2. 8.5.2 Transmit Direction (Right Diagram of Figure 1-1 )
    6. 8.6 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 I2C Bus Overview
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Insulation Lifetime
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) All pins ±6000 V
Bus pins (SDA1, SCL1) to GND1 ±10000 V
Bus pins (SDA2, SCL2) to GND2 ±14000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1500 V
Contact discharge per IEC 61000-4-2; Isolation barrier withstand test(3)(4) ±8000 V
Same side unpowered IEC ESD contact discharge per IEC 61000-4-2; Side 2 SCL2, SDA2 ±8000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) IEC ESD strike is applied across the barrier with all pins on each side tied together creating a two-terminal device.
(4) Testing is carried out in air or oil to determine the intrinsic contact discharge capability of the device.