SLLSFC3A March   2020  – December 2021 ISO1640-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6.     Insulation Specifications
    7. 6.6  Safety-Related Certifications
    8. 6.7  Safety Limiting Values
    9. 6.8  Electrical Characteristics
    10. 6.9  Supply Current Characteristics
    11. 6.10 Timing Requirements
    12. 6.11 Switching Characteristics
    13. 6.12 Insulation Characteristics Curves
    14. 6.13 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Isolation Technology Overview
    4. 8.4 Feature Description
      1. 8.4.1 Hot Swap
      2. 8.4.2 Protection Features
    5. 8.5 Isolator Functional Principle
      1. 8.5.1 Receive Direction (Left Diagram of Figure 1-1 )
      2. 8.5.2 Transmit Direction (Right Diagram of Figure 1-1 )
    6. 8.6 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 I2C Bus Overview
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Insulation Lifetime
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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Device Functional Modes

Table 8-2 lists the ISO164x-Q1 functional modes.

Table 8-2 I2C Function Table(1)
POWER STATEI2C INPUTI2C OUTPUT
VCC1 < 2.3 V or VCC2 < 1.7 VXZ
VCC1 > 2.9 V and VCC2 > 2.25 VLL
VCC1 > 2.9 V and VCC2 > 2.25 VHZ
VCC1 > 2.9 V and VCC2 > 2.25 VZ(2)

Undetermined

H = High Level; L = Low Level; Z = High Impedance or Float; X = Irrelevant
Invalid input condition as an I2C system requires that a pullup resistor to VCC is connected.
Table 8-3 GPIO Function Table (ISO1642, ISO1643 and ISO1644 only)(1)
VCCI VCCO GPIO INPUT
(INx)
GPIO OUTPUT
(OUTx)
COMMENTS
PU PU H H Normal Operation:
A channel output assumes the logic state of the input.
L L
Open L Default mode: When INx is open, the corresponding channel output goes to the default low logic state.
PD PU X L Default mode: When VCCI is unpowered, a channel output assumes the low default logic state.
When VCCI transitions from unpowered to powered-up, a channel output assumes the logic state of the input.
When VCCI transitions from powered-up to unpowered, channel output assumes the low default state.
X PD X Undetermined(2) When VCCO is unpowered, a channel output is undetermined.
When VCCO transitions from unpowered to powered-up, a channel output assumes the logic state of the input
VCCI = Input-side VCC; VCCO = Output-side VCC; PU = Powered up (VCC1 ≥ 2.9 V or VCC2 ≥ 2.25 V); PD = Powered down (VCC1 ≤ 2.3 V or VCC2 ≤ 1.7 V); X = Irrelevant; H = High level; L = Low level
A strongly driven input signal can weakly power the floating VCC via an internal protection diode and cause undetermined output.