ZHCSEX8B December   2015  – December 2021 INA300-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Selecting a Current-Sensing Resistor
        1. 7.3.1.1 Selecting a Current-Sensing Resistor: Example
      2. 7.3.2 Setting The Current-Limit Threshold
        1. 7.3.2.1 Resistor-Controlled Current Limit
        2. 7.3.2.2 Voltage Source-Controlled Current Limit
      3. 7.3.3 Delay Setting
      4. 7.3.4 Alert Timing Response
      5. 7.3.5 Selectable Hysteresis
      6. 7.3.6 Alert Output
      7. 7.3.7 Noise Adjustment Factor (NAF)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Alert Mode
        1. 7.4.1.1 Transparent Output Mode
        2. 7.4.1.2 Latch Output Mode
      2. 7.4.2 Disable Mode
      3. 7.4.3 Input Filtering
      4. 7.4.4 Using the INA300-Q1 INA300-Q1 With Common-Mode Transients Above 36 V
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Unidirectional Operation
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Bidirectional Operation
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Window Comparator
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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7.3.2.1 Resistor-Controlled Current Limit

The typical approach for setting the limit threshold voltage is to connect a resistor from the LIMIT terminal to ground. The value of this resistor, RLIMIT, is chosen to create a corresponding voltage at the LIMIT terminal equivalent to the voltage, VTRIP, developed by the load current flowing through the current-sensing resistor. An internal 20-µA current source is present at the LIMIT terminal that creates the corresponding voltage depending on the value of RLIMIT. In the equations from Table 7-2, VTRIP represents the overcurrent threshold the device is programmed to monitor for and VLIMIT is the programmed signal set to detect the VTRIP level. The term noise adjustment factor (NAF) is included in the VLIMIT equation for the 10-µs delay setting. This value is equal to 500 µV and adjusts the operating point for the internal noise in this delay setting. The 50-µs and 100-µs delay settings do not use the NAF term in calculating the VLIMIT threshold. See Section 7.3.7 for more details on the noise adjustment factor.

In Table 7-2, the process for calculating the required value for RLIMIT to set the appropriate threshold voltage, VLIMIT, is shown. This calculation is based on the 10-µs delay setting so the NAF term is included in the calculation. For a delay setting of 50 µs or 100 µs, the NAF term is omitted.

Table 7-2 Calculating the Limit Threshold Setting Resistor, RLIMIT
PARAMETEREQUATION
VTRIPDesired current trip valueILOAD × RSENSE
VLIMITProgrammed threshold limit voltageVLIMIT = VTRIP
VLIMIT (1)Threshold voltage(ILIMIT × RLIMIT) – NAF
RLIMIT (1)Threshold limit setting resistor(VLIMIT + NAF) / ILIMIT
RLIMIT (1)Limit setting resistor(VLIMIT + 500 µV) / 20 µA
(1) NAF is used with the 10-µs delay setting. NAF can be omitted in the RLIMIT calculation for the 50-µs and 100-µs delay settings.

TI recommends using NAF in calculating the value for VLIMIT and RLIMIT at the 10-µs delay setting. Removing NAF from the VLIMIT and RLIMIT calculation at the 10-µs delay setting lowers the trigger point of the alert output. Lowering the trigger point results in the device issuing an overcurrent alert prior to reaching the corresponding VTRIP threshold. The averaging effect included with the 50-µs and 100-µs delay settings inherently eliminates the effect internal noise has on the threshold voltage.