ZHCSEX8B December   2015  – December 2021 INA300-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Selecting a Current-Sensing Resistor
        1. 7.3.1.1 Selecting a Current-Sensing Resistor: Example
      2. 7.3.2 Setting The Current-Limit Threshold
        1. 7.3.2.1 Resistor-Controlled Current Limit
        2. 7.3.2.2 Voltage Source-Controlled Current Limit
      3. 7.3.3 Delay Setting
      4. 7.3.4 Alert Timing Response
      5. 7.3.5 Selectable Hysteresis
      6. 7.3.6 Alert Output
      7. 7.3.7 Noise Adjustment Factor (NAF)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Alert Mode
        1. 7.4.1.1 Transparent Output Mode
        2. 7.4.1.2 Latch Output Mode
      2. 7.4.2 Disable Mode
      3. 7.4.3 Input Filtering
      4. 7.4.4 Using the INA300-Q1 INA300-Q1 With Common-Mode Transients Above 36 V
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Unidirectional Operation
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Bidirectional Operation
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Window Comparator
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Latch Output Mode

Some applications do not have the functionality available to continuously monitor the state of the output ALERT terminal to detect an overcurrent condition. A typical example of this application is a system that is only able to poll the ALERT terminal state periodically to determine if the system is functioning correctly. If the device is set to transparent mode in this type of application, missing the change in state of the ALERT terminal is possible when ALERT is pulled low to indicate an out-of-range event if the out-of-range condition does not appear during one of these periodic polling events.

Latch mode is specifically intended to accommodate these applications. As shown in Table 7-6, the device is placed in latch mode by setting the voltage on the LATCH terminal to a logic high level. The difference between latch mode and transparent mode is how the alert output responds when an overcurrent event ends. In transparent mode, when the differential input signal drops below the limit threshold level for 10 µs, the output state returns to the default high setting to indicate that the overcurrent event had ended.

In latch mode, when an overlimit condition is detected and the ALERT terminal is pulled low, the ALERT terminal does not return to the default high level when the differential input signal drops below the alert threshold level for 10 µs. To clear the alert the LATCH terminal must be pulled low for at least 20 µs. Pulling the LATCH terminal low allows the ALERT terminal to return to the default high level, provided that the differential input signal has dropped below the alert threshold. If the input signal is still above the threshold limit when the LATCH terminal is pulled low, the ALERT terminal remains low. When the alert condition is detected by the system controller (the LATCH terminal) can be set back to high in order to place the device back in latch mode.

Table 7-6 Output Mode Settings
OUTPUT MODELATCH TERMINAL SETTING
Transparent modeLATCH = low
Latch modeLATCH = high

The latch and transparent modes are represented in Figure 7-8. In Figure 7-8 when VIN drops back below the VLIMIT threshold for the first time, the LATCH terminal is pulled high. With the LATCH terminal pulled high, the device is set to latch mode so that the alert output state does not return high when the input signal drops below the VLIMIT threshold. Only when the LATCH terminal is pulled low does the ALERT terminal return to the default high level, indicating that the input signal is below the limit threshold. When the input signal drops below the limit threshold for the second time, the LATCH terminal is already pulled low. The device is set to transparent mode at this point and the ALERT terminal is pulled back high when the input signal drops below the alert threshold.

GUID-29BB1C39-6ADD-4C42-B4F4-26B34786931C-low.gifFigure 7-8 Transparent vs Latch Mode