ZHCSO32C September   2000  – January 2022 INA126 , INA2126

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: INA126
    5. 6.5 Thermal Information: INA2126
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Single-Supply Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting the Gain
        2. 8.2.2.2 Offset Trimming
        3. 8.2.2.3 Input Bias Current Return
        4. 8.2.2.4 Input Common-Mode Range
        5. 8.2.2.5 Input Protection
        6. 8.2.2.6 Channel Crosstalk—Dual Version
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
    1. 9.1 Low-Voltage Operation
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 PSpice® for TI
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Electrical Characteristics

at TA = 25°C, VS = ±15 V, RL = 25 kΩ, VREF = 0 V, and VCM = VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
VOS Offset voltage (RTI) INA126P/U/E
INA2126P/U/E
±100 ±250 µV
INA126PA/UA/EA
INA2126PA/UA/EA
±150 ±500
Offset voltage drift (RTI) TA = –40°C to +85°C INA126P/U/E
INA2126P/U/E
±0.5 ±3 µV/°C
INA126PA/UA/EA
INA2126PA/UA/EA
±0.5 ±5
PSRR Power-supply rejection ratio (RTI) VS =  ±1.35 V to ±18 V INA126P/U/E
INA2126P/U/E
±5 ±15 uV/V
INA126PA/UA/EA
INA2126PA/UA/EA
±5 ±50
Input impedance 1 || 4 GΩ || pF
Safe input voltage RS = 0 Ω (V–) – 0.5 (V+) + 0.5 V
RS = 1 kΩ (V–) – 10 (V+) + 10
VCM Common-mode voltage(5) –11.25 ±11.5 11.25 V
Channel seperation (dual) G = 5, dc 130 dB
CMRR Common-mode rejection ratio RS = 0 Ω, VCM = ±11.25 V INA126P
INA2126P
83 94 dB
INA126U/E
INA2126U/E
80 94
INA126PA/UA/EA
INA2126PA/UA/EA
74 83
INPUT BIAS CURRENT
IB Input bias current INA126P/U/E
INA2126P/U/E
±10 ±25 nA
INA126PA/UA/EA
INA2126PA/UA/EA
±10 ±50
Input bias current drift TA = –40°C to +85°C ±30 pA/℃
IOS Input offset current INA126P/U/E
INA2126P/U/E
±0.5 ±2 nA
INA126PA/UA/EA
INA2126PA/UA/EA
±0.5 ±5 nA
Input offset current drift TA = –40°C to +85°C ±10 pA/℃
GAIN
Gain equation 5 + (80 kΩ / RG) V/V
G Gain 5 10000 V/V
GE Gain error G = 5 , VO = ±14 V INA126P/U/E
INA2126P/U/E
±0.02 ±0.1 %
INA126PA/UA/EA
INA2126PA/UA/EA
±0.02 ±0.18
G = 100, VO = ±12 V INA126P/U/E
INA2126P/U/E
±0.2 ±0.5
INA126PA/UA/EA
INA2126PA/UA/EA
±0.2 ±1
Gain drift(6) TA = –40°C to +85°C G = 5 ±2 ±10 ppm/°C
G = 100 ±25 ±100
Gain nonlinearity G = 100, VO = ±14 V ±0.002 ±0.012 %
NOISE
eN Voltage noise f = 1 kHz 35 nV/√Hz
f = 100 Hz 35
fB = 10 Hz 45
fB = 0.1 Hz to 10 Hz 0.7 µVPP
In Current noise f = 1 kHz 160 fA/√Hz
f= 0.1Hz to 10Hz 7.3 pAPP
OUTPUT
Positive output voltage swing (V+) – 0.9 (V+) – 0.75 V
Negative output voltage swing (V–) + 0.95 (V–) + 0.8 V
ISC Short-circuit current Continuous to VS / 2 ±5 mA
CL Load capacitance Stable operation 1000 pF
FREQUENCY RESPONSE
BW Bandwidth, –3 dB G = 5 200 kHz
G = 100 9
G = 500 1.8
SR Slew rate G = 5, VO = ±10 V 0.4 V/µs
tS Settling time To 0.01%, VSTEP = 10 V G = 5 30 µs
G = 100 160
G = 500 1500
Overload recovery 50% input overload 4 µs
POWER SUPPLY
IQ Quiescent current (per channel) IO = 0 mA ±175 ±200 µA
Input voltage range of the instrumentation amplifier input stage. The input range depends on the common-mode voltage, differential voltage, gain, and reference voltage. See Typical Characteristic curves.
The values specified for G > 5 do not include the effects of the external gain-setting resistor, RG.