ZHCSFB0D June   2016  – November 2023 DRV2510-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input and Configurable Pre-amplifier
      2. 7.3.2 Pulse-Width Modulator (PWM)
      3. 7.3.3 Designed for low EMI
      4. 7.3.4 Device Protection Systems
        1. 7.3.4.1 Diagnostics
          1. 7.3.4.1.1 Load Diagnostics
        2. 7.3.4.2 Faults During Load Diagnostics
        3. 7.3.4.3 Protection and Monitoring
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation in Shutdown Mode
      2. 7.4.2 Operation in Standby Mode
      3. 7.4.3 Operation in Active Mode
    5. 7.5 Programming
      1. 7.5.1 General I2C Operation
      2. 7.5.2 Single-Byte and Multiple-Byte Transfers
      3. 7.5.3 Single-Byte Write
      4. 7.5.4 Multiple-Byte Write and Incremental Multiple-Byte Write
      5. 7.5.5 Single-Byte Read
      6. 7.5.6 Multiple-Byte Read
    6. 7.6 Register Map
      1. 7.6.1 Address: 0x01
      2. 7.6.2 Address: 0x02
      3. 7.6.3 Address: 0x03
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Single-Ended Source
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Optional Components
          2. 8.2.1.2.2 Capacitor Selection
          3. 8.2.1.2.3 Solenoid Selection
          4. 8.2.1.2.4 Output Filter Considerations
        3. 8.2.1.3 Application Curves
        4. 8.2.1.4 Differential Input Diagram
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 第三方产品免责声明
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 静电放电警告
    6. 11.6 术语表
  13. 12Mechanical, Packaging, and Orderable Information

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7.3.4.3 Protection and Monitoring

  • Overcurrent Shutdown (OCSD)—The overcurrent shutdown forces the output into Hi-Z. The device asserts the INTZ pin and updates the I2C register.
  • DC Detect—This circuit checks for a dc offset continuously during normal operation at the output of the amplifier. If a dc offset occurs, the device asserts the INTZ pin and updates the I2C register. Note that the dc detection threshold follows VDD changes.
  • Overtemperature Shutdown (OTSD)—The device shuts down when the die junction temperature reaches the overtemperature threshold. The device asserts the INTZ pin and updates I2C register. Recovery is automatic when the temperature returns to a safe level.
  • Undervoltage (UV)—The undervoltage (UV) protection detects low voltages on VDD. In the event of an undervoltage condition, the device asserts the INTZ pin and resets the I2C register.
  • Power-On Reset (POR)—Power-on reset (POR) occurs when VDD drops below the POR threshold. A POR event causes the I2C bus to go into a high-impedance state. After recovery from the POR event, the device restarts automatically with default I2C register settings. The I2C is active as long as the device is not in POR.
  • Overvoltage (OV) and Load Dump—OV protection detects high voltages on VDD. If VDD reaches the overvoltage threshold, the device asserts the INTZ pin and updates the I2C register. The device can withstand 40-V load-dump voltage spikes.
  • SpeakerGuard™—This protection circuitry limits the output voltage to the value selected in I2C register 0x03. This value determines both the positive and negative limits. The user can use the SpeakerGuard feature to improve battery life or protect the actuator from exceeding its excursion limits.
  • Adjacent-Pin Shorts—The device design is such that shorts between adjacent pins do not cause damage.