ZHCSE90D September 2015 – September 2020 DLPC910
PRODUCTION DATA
The DESTOP_RESET_REG register is used for reading the current state of the MCP. Reading this register while the DLPC910 is loading data to the DMD may always indicate a “1”. It is best to monitor the actual RST_ACTIVE output signal of the DLPC910 to obtain the real state of the MCP.
ADDRESS | BITS | DESCRIPTION | RESET | TYPE |
---|---|---|---|---|
0x0020 | 0 | RESET Operation in progress bit: (Mirror clocking pulse) 0 - Reset inactive 1 - Reset active | 0x0 | R |
31:1 | UNUSED | 0x0 | R |